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公开(公告)号:US12183653B2
公开(公告)日:2024-12-31
申请号:US17726916
申请日:2022-04-22
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Joungphil Lee , Myung-Sung Kang , Yeongseok Kim , Gwangsun Seo , Hyein Yoo , Yongwon Choi
IPC: H01L23/373 , C09J7/28 , C09J11/04 , H01L23/00 , H01L23/29 , H01L23/31 , H01L23/367 , H01L23/538
Abstract: An adhesive film includes a porous metal layer having a plurality of pores therein, a first adhesive layer on one side of the porous metal layer, an adhesive substance at least partially filling the pores of the porous metal layer, and a plurality of first thermal conductive members distributed in the first adhesive layer.
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2.
公开(公告)号:US11342310B2
公开(公告)日:2022-05-24
申请号:US17172478
申请日:2021-02-10
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yongwon Choi , Wonkeun Kim , Inyoung Lee
IPC: H01L23/00 , H01L25/065 , H01L25/00
Abstract: A semiconductor chip including a semiconductor substrate having a first surface and a second surface and having an active layer in a region adjacent to the first surface, a first through electrode penetrating at least a portion of the semiconductor substrate and connected to the active layer, a second through electrode located at a greater radial location from the center of the semiconductor substrate than the first through electrode, penetrating at least a portion of the semiconductor substrate, and connected to the active layer. The semiconductor chip also including a first chip connection pad having a first height and a first width, located on the second surface of the semiconductor substrate, and connected to the first through electrode, and a second chip connection pad having a second height greater than the first height and a second width greater than the first width, located on the second surface of the semiconductor substrate, and connected to the second through electrode.
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3.
公开(公告)号:US11784168B2
公开(公告)日:2023-10-10
申请号:US17748164
申请日:2022-05-19
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yongwon Choi , Wonkeun Kim , Inyoung Lee
IPC: H01L23/00 , H01L25/065 , H01L25/00
CPC classification number: H01L25/0657 , H01L24/06 , H01L25/50 , H01L2224/06517 , H01L2225/06513 , H01L2225/06541 , H01L2225/06586 , H01L2225/06589
Abstract: A semiconductor chip including a semiconductor substrate having a first surface and a second surface and having an active layer in a region adjacent to the first surface, a first through electrode penetrating at least a portion of the semiconductor substrate and connected to the active layer, a second through electrode located at a greater radial location from the center of the semiconductor substrate than the first through electrode, penetrating at least a portion of the semiconductor substrate, and connected to the active layer. The semiconductor chip also including a first chip connection pad having a first height and a first width, located on the second surface of the semiconductor substrate, and connected to the first through electrode, and a second chip connection pad having a second height greater than the first height and a second width greater than the first width, located on the second surface of the semiconductor substrate, and connected to the second through electrode.
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公开(公告)号:US10910339B2
公开(公告)日:2021-02-02
申请号:US16533450
申请日:2019-08-06
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Hwail Jin , Yongwon Choi , Myung-Sung Kang , Yeongseok Kim , Wonkeun Kim
Abstract: A flip chip bonding method includes obtaining a die including a first substrate and an adhesive layer on the first substrate; bonding the die to a second substrate different from the first substrate; and curing the adhesive layer. The curing the adhesive layer includes heating the second substrate to melt the adhesive layer, and providing the adhesive layer and the second substrate with air having pressure greater than atmospheric pressure.
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5.
公开(公告)号:US20220278079A1
公开(公告)日:2022-09-01
申请号:US17748164
申请日:2022-05-19
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yongwon Choi , Wonkeun Kim , Inyoung Lee
IPC: H01L25/065 , H01L23/00 , H01L25/00
Abstract: A semiconductor chip including a semiconductor substrate having a first surface and a second surface and having an active layer in a region adjacent to the first surface, a first through electrode penetrating at least a portion of the semiconductor substrate and connected to the active layer, a second through electrode located at a greater radial location from the center of the semiconductor substrate than the first through electrode, penetrating at least a portion of the semiconductor substrate, and connected to the active layer. The semiconductor chip also including a first chip connection pad having a first height and a first width, located on the second surface of the semiconductor substrate, and connected to the first through electrode, and a second chip connection pad having a second height greater than the first height and a second width greater than the first width, located on the second surface of the semiconductor substrate, and connected to the second through electrode.
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6.
公开(公告)号:US11355413B2
公开(公告)日:2022-06-07
申请号:US16540495
申请日:2019-08-14
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Joungphil Lee , Myung-Sung Kang , Yeongseok Kim , Gwangsun Seo , Hyein Yoo , Yongwon Choi
IPC: C09J7/28 , C09J11/04 , H01L23/373 , H01L23/29 , H01L23/00 , H01L23/31 , H01L23/538 , H01L23/367
Abstract: An adhesive film includes a porous metal layer having a plurality of pores therein, a first adhesive layer on one side of the porous metal layer, an adhesive substance at least partially filling the pores of the porous metal layer, and a plurality of first thermal conductive members distributed in the first adhesive layer.
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7.
公开(公告)号:US20210384162A1
公开(公告)日:2021-12-09
申请号:US17172478
申请日:2021-02-10
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yongwon Choi , Wonkeun Kim , Inyoung Lee
IPC: H01L25/065 , H01L23/00 , H01L25/00
Abstract: A semiconductor chip including a semiconductor substrate having a first surface and a second surface and having an active layer in a region adjacent to the first surface, a first through electrode penetrating at least a portion of the semiconductor substrate and connected to the active layer, a second through electrode located at a greater radial location from the center of the semiconductor substrate than the first through electrode, penetrating at least a portion of the semiconductor substrate, and connected to the active layer. The semiconductor chip also including a first chip connection pad having a first height and a first width, located on the second surface of the semiconductor substrate, and connected to the first through electrode, and a second chip connection pad having a second height greater than the first height and a second width greater than the first width, located on the second surface of the semiconductor substrate, and connected to the second through electrode.
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