-
1.发明申请公开(公告)号：US20220278079A1
公开(公告)日：2022-09-01
申请号：US17748164
申请日：2022-05-19
发明人： Yongwon Choi , Wonkeun Kim , Inyoung Lee
IPC分类号： H01L25/065 , H01L23/00 , H01L25/00
摘要： A semiconductor chip including a semiconductor substrate having a first surface and a second surface and having an active layer in a region adjacent to the first surface, a first through electrode penetrating at least a portion of the semiconductor substrate and connected to the active layer, a second through electrode located at a greater radial location from the center of the semiconductor substrate than the first through electrode, penetrating at least a portion of the semiconductor substrate, and connected to the active layer. The semiconductor chip also including a first chip connection pad having a first height and a first width, located on the second surface of the semiconductor substrate, and connected to the first through electrode, and a second chip connection pad having a second height greater than the first height and a second width greater than the first width, located on the second surface of the semiconductor substrate, and connected to the second through electrode.
-
2.发明公开公开(公告)号：US20240079260A1
公开(公告)日：2024-03-07
申请号：US18232589
申请日：2023-08-10
发明人： Hansol Yoo , Wonkeun Kim
IPC分类号： H01L21/683 , C09J7/20 , H01L21/67
CPC分类号： H01L21/6836 , C09J7/20 , H01L21/67132 , C09J2203/326 , H01L2221/68327
摘要： An adhesive tape sheet includes a dicing tape having an attachment region extending along an outer circumference thereof so as to be attached to a ring frame used when dicing a wafer, an adhesive film on the dicing tape radially inside of an inner boundary of the attachment region and to which the wafer is bonded, and an incision pattern portion within the attachment region and including first incision patterns that are spaced apart from each other along a first concentric circle having a first radius and second incision patterns that are spaced apart from each other along a second concentric circle having a second radius greater than the first radius. Each of the first incision patterns has a convex arch shape toward a center of the dicing tape, and each of the second incision patterns has a convex arch shape toward an outside of the dicing tape.
-
公开(公告)号：US09177942B2
公开(公告)日：2015-11-03
申请号：US14463650
申请日：2014-08-19
发明人： Wonkeun Kim , In-Young Lee , Chang-Seong Jeon , Taeje Cho
CPC分类号： H01L25/105 , H01L23/3128 , H01L23/345 , H01L23/36 , H01L23/3677 , H01L24/19 , H01L25/0657 , H01L25/50 , H01L2225/06517 , H01L2225/06568 , H01L2225/06589 , H01L2225/1023 , H01L2225/1058 , H01L2225/1094 , H01L2924/181 , H01L2924/00
摘要： Provided are semiconductor packages and methods of fabricating the same. The method may include mounting a first semiconductor chip including chip and heat-transfer regions and a lower heat-transfer pattern disposed on the heat-transfer region, on a substrate, mounting a second semiconductor chip on the chip region of the first semiconductor chip, forming a mold layer on the substrate to enclose the first and second semiconductor chips, forming an opening in the mold layer to expose at least a portion of the lower heat-transfer pattern, forming a heat-pathway pattern in the opening, and forming a heat-dissipating part on the second semiconductor chip and the mold layer to be connected to the heat-pathway pattern.
摘要翻译： 提供半导体封装及其制造方法。 该方法可以包括在基板上安装包括芯片和传热区域的第一半导体芯片和设置在传热区域上的较低传热图案，将第二半导体芯片安装在第一半导体芯片的芯片区域上， 在所述基板上形成模具层以包围所述第一和第二半导体芯片，在所述模具层中形成开口以露出所述下部传热图案的至少一部分，以在所述开口中形成热通路图案，并且形成 第二半导体芯片上的散热部件和要连接到热通路图案的模具层。
-
公开(公告)号：US11876031B2
公开(公告)日：2024-01-16
申请号：US17376600
申请日：2021-07-15
发明人： Joungphil Lee , Wonkeun Kim , Mihyae Park
IPC分类号： H01L23/373 , H01L23/31 , H01L23/552 , H01L25/065 , H01L25/10 , H01L23/367
CPC分类号： H01L23/3737 , H01L23/3128 , H01L23/3675 , H01L23/552 , H01L25/0652 , H01L25/0655 , H01L25/0657 , H01L25/105 , H01L2225/0651 , H01L2225/06513 , H01L2225/06537 , H01L2225/06541 , H01L2225/06568 , H01L2225/06586 , H01L2225/06589 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058
摘要： A semiconductor package includes at least one semiconductor device mounted on a first substrate, a thermosetting resin layer on the at least one semiconductor device, the thermosetting resin layer including an irreversible thermochromic pigment, a metal plate on the thermosetting resin layer, and a molding member surrounding the at least one semiconductor device at least in a lateral direction and being in contact with the thermosetting resin layer.
-
5.发明申请公开(公告)号：US20210384162A1
公开(公告)日：2021-12-09
申请号：US17172478
申请日：2021-02-10
发明人： Yongwon Choi , Wonkeun Kim , Inyoung Lee
IPC分类号： H01L25/065 , H01L23/00 , H01L25/00
摘要： A semiconductor chip including a semiconductor substrate having a first surface and a second surface and having an active layer in a region adjacent to the first surface, a first through electrode penetrating at least a portion of the semiconductor substrate and connected to the active layer, a second through electrode located at a greater radial location from the center of the semiconductor substrate than the first through electrode, penetrating at least a portion of the semiconductor substrate, and connected to the active layer. The semiconductor chip also including a first chip connection pad having a first height and a first width, located on the second surface of the semiconductor substrate, and connected to the first through electrode, and a second chip connection pad having a second height greater than the first height and a second width greater than the first width, located on the second surface of the semiconductor substrate, and connected to the second through electrode.
-
6.发明授权公开(公告)号：US11342310B2
公开(公告)日：2022-05-24
申请号：US17172478
申请日：2021-02-10
发明人： Yongwon Choi , Wonkeun Kim , Inyoung Lee
IPC分类号： H01L23/00 , H01L25/065 , H01L25/00
摘要： A semiconductor chip including a semiconductor substrate having a first surface and a second surface and having an active layer in a region adjacent to the first surface, a first through electrode penetrating at least a portion of the semiconductor substrate and connected to the active layer, a second through electrode located at a greater radial location from the center of the semiconductor substrate than the first through electrode, penetrating at least a portion of the semiconductor substrate, and connected to the active layer. The semiconductor chip also including a first chip connection pad having a first height and a first width, located on the second surface of the semiconductor substrate, and connected to the first through electrode, and a second chip connection pad having a second height greater than the first height and a second width greater than the first width, located on the second surface of the semiconductor substrate, and connected to the second through electrode.
-
7.发明授权公开(公告)号：US11784168B2
公开(公告)日：2023-10-10
申请号：US17748164
申请日：2022-05-19
发明人： Yongwon Choi , Wonkeun Kim , Inyoung Lee
IPC分类号： H01L23/00 , H01L25/065 , H01L25/00
CPC分类号： H01L25/0657 , H01L24/06 , H01L25/50 , H01L2224/06517 , H01L2225/06513 , H01L2225/06541 , H01L2225/06586 , H01L2225/06589
摘要： A semiconductor chip including a semiconductor substrate having a first surface and a second surface and having an active layer in a region adjacent to the first surface, a first through electrode penetrating at least a portion of the semiconductor substrate and connected to the active layer, a second through electrode located at a greater radial location from the center of the semiconductor substrate than the first through electrode, penetrating at least a portion of the semiconductor substrate, and connected to the active layer. The semiconductor chip also including a first chip connection pad having a first height and a first width, located on the second surface of the semiconductor substrate, and connected to the first through electrode, and a second chip connection pad having a second height greater than the first height and a second width greater than the first width, located on the second surface of the semiconductor substrate, and connected to the second through electrode.
-
公开(公告)号：US11211273B2
公开(公告)日：2021-12-28
申请号：US16424834
申请日：2019-05-29
发明人： Ji-Han Ko , Wonkeun Kim
IPC分类号： H01L21/673 , H01L21/50 , C03C27/06 , B32B17/06 , H01L23/00
摘要： A carrier substrate and a packaging method, the carrier substrate including a first layer; a second layer; and a first glue layer between the first layer and the second layer, wherein the first glue layer is removably attached to the first layer.
-
公开(公告)号：US10910339B2
公开(公告)日：2021-02-02
申请号：US16533450
申请日：2019-08-06
发明人： Hwail Jin , Yongwon Choi , Myung-Sung Kang , Yeongseok Kim , Wonkeun Kim
摘要： A flip chip bonding method includes obtaining a die including a first substrate and an adhesive layer on the first substrate; bonding the die to a second substrate different from the first substrate; and curing the adhesive layer. The curing the adhesive layer includes heating the second substrate to melt the adhesive layer, and providing the adhesive layer and the second substrate with air having pressure greater than atmospheric pressure.
-
-
-
-
-
-
-
-
搜索结果
9 条记录 (耗时 0.015 秒)
