公开(公告)号：US5561310A

公开(公告)日：1996-10-01

申请号：US380654

申请日：1995-01-30

申请人： Sang H. Woo ,  Ha E. Jeon ,  Young J. Park

发明人： Sang H. Woo ,  Ha E. Jeon ,  Young J. Park

IPC分类号： H01L21/28 ,  H01L21/033 ,  H01L21/306 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/04 ,  H01L27/10 ,  H01L27/108

CPC分类号： H01L27/10852 ,  H01L21/0337 ,  H01L27/10817

摘要： A storage electrode of a DRAM cell in a highly-integrated semiconductor device has, in order to secure the surface area thereof greater than that of a conventional tunnel-type storage electrode, an upper plate of storage electrode formed over a lower plate of storage electrode separated therefrom by a predetermined distance, while interposing bars of irregularly shapes formed of a conductive layer to electrically connect the upper and lower plates.

摘要翻译： 高集成度半导体装置中的DRAM单元的存储电极为了确保其表面积比常规的隧道式存储电极的表面积更大，存储电极的上板形成在存储电极的下板上 与其隔开预定距离，同时插入由导电层形成的不规则形状的条以电连接上板和下板。

公开(公告)号：US5405799A

公开(公告)日：1995-04-11

申请号：US138204

申请日：1993-10-20

申请人： Sang H. Woo ,  Ha E. Jeon ,  Young J. Park

发明人： Sang H. Woo ,  Ha E. Jeon ,  Young J. Park

IPC分类号： H01L21/28 ,  H01L21/033 ,  H01L21/306 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/04 ,  H01L27/10 ,  H01L27/108 ,  H01L21/70

CPC分类号： H01L27/10852 ,  H01L21/0337 ,  H01L27/10817

摘要： A storage electrode of a DRAM cell in a highly-integrated semiconductor device has, in order to secure the surface area thereof greater than that of a conventional tunnel-type storage electrode, an upper plate of storage electrode formed over a lower plate of storage electrode separated therefrom by a predetermined distance, while interposing bars of various shapes formed of a conductive layer to electrically connect the upper and lower plates, and a method for manufacturing the storage electrode is also provided.

摘要翻译： 高集成度半导体装置中的DRAM单元的存储电极为了确保其表面积比常规的隧道式存储电极的表面积更大，存储电极的上板形成在存储电极的下板上 与预定距离分离，同时插入由导电层形成的各种形状的条以电连接上板和下板，还提供了用于制造存储电极的方法。

公开(公告)号：US5346846A

公开(公告)日：1994-09-13

申请号：US84760

申请日：1993-06-29

申请人： Young J. Park ,  Ha J. Jeon

发明人： Young J. Park ,  Ha J. Jeon

IPC分类号： H01L27/04 ,  H01L21/02 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108 ,  H01L21/70

CPC分类号： H01L28/92 ,  H01L27/10817 ,  Y10S438/947

摘要： This is a method of manufacturing a DRAM cell of a highly integrated semiconductor device increased in the capacity of its capacitor as several cylinder-shaped storage electrodes with first and second polysilicon layers are formed. In order to form several cylinder-shaped electrodes, a polysilicon layer of hemisphere grain structures is used as a mask during the etching process.

摘要翻译： 这是制造高容量半导体器件的DRAM单元的方法，该半导体器件由于形成有多个第一和第二多晶硅层的几个圆柱形的存储电极而使其电容器的容量增加。 为了形成多个圆柱形电极，在蚀刻过程中使用半球晶粒结构的多晶硅层作为掩模。

公开(公告)号：US5332685A

公开(公告)日：1994-07-26

申请号：US82276

申请日：1993-06-24

申请人： Young J. Park ,  Seok H. Lee

发明人： Young J. Park ,  Seok H. Lee

IPC分类号： H01L27/10 ,  H01L21/8242 ,  H01L21/70

CPC分类号： H01L27/10852 ,  Y10S438/907

摘要： Disclosed is a novel DRAM manufacturing method to reduce difficulties due to the high aspect ratio of contact hole for storage electrode. The method comprises the steps of formation of a contact plug on contact areas of bit line and storage electrode at the same time and then, formation of a bit line that is in contact with the contact plug for bit line and finally, making a storage electrode that is as high as the bit line contact with the contact plug for storage electrode.

摘要翻译： 公开了一种新颖的DRAM制造方法，用于减少由于用于存储电极的接触孔的高纵横比引起的困难。 该方法包括以下步骤：同时在位线和存储电极的接触区域上形成接触塞，然后形成与位线的接触插塞接触的位线，最后制成存储电极 与存储电极的接触插塞的位线接触一样高。

公开(公告)号：US5573968A

公开(公告)日：1996-11-12

申请号：US606199

申请日：1996-02-23

申请人： Young J. Park

发明人： Young J. Park

IPC分类号： H01L27/04 ,  H01L21/02 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/108 ,  H01L21/70 ,  H01L27/00

CPC分类号： H01L27/10852 ,  H01L27/10817 ,  H01L28/91 ,  Y10S438/97

摘要： A method for fabricating capacitors of a semiconductor device, capable of forming a storage electrode provided at its side walls with irregularity providing an increased surface area in accordance with an etch process using a difference in etch selectivity between doped and undoped silicon films. The method includes forming doped and undoped amorphous conduction films in an alternating manner over a semiconductor substrate formed with a contact hole, thereby forming a first amorphous conduction layer having a multi-layer structure, forming an insulating film pattern on the first amorphous conduction layer, forming undoped and doped amorphous conduction films in an alternating manner over the resulting structure, thereby forming a second amorphous conduction layer, etching the resulting structure under a condition that the insulating film pattern and lower insulating layer are used as an etch barrier, annealing the amorphous conduction layers, thereby forming crystallized conduction layers without diffusing an impurity, etching doped portions of the conduction layers, thereby providing an irregularity structure at the conduction layers, and doping impurity ions in undoped portions of the conduction layers, thereby forming a cylindrical storage electrode having the irregularity structure at each side wall thereof.

摘要翻译： 一种用于制造半导体器件的电容器的方法，其能够根据使用掺杂和未掺杂的硅膜之间的蚀刻选择性差异的蚀刻工艺在其侧壁上形成具有不规则性的提供增加的表面积的存储电极。 该方法包括在形成有接触孔的半导体衬底上交替形成掺杂和未掺杂的非晶导体膜，由此形成具有多层结构的第一非晶形导电层，在第一非晶导体层上形成绝缘膜图案， 在所得结构上以交替方式形成未掺杂和掺杂的非晶导体膜，从而形成第二非晶导体层，在绝缘膜图案和下绝缘层用作蚀刻阻挡层的条件下蚀刻所得结构， 导电层，从而形成结晶化的导电层而不扩散杂质，蚀刻导电层的掺杂部分，从而在导电层处提供不规则结构，并且在导电层的未掺杂部分中掺杂杂质离子，从而形成具有 不规则 在其每个侧壁处的结构。

公开(公告)号：US5457063A

公开(公告)日：1995-10-10

申请号：US230343

申请日：1994-04-20

申请人： Young J. Park

发明人： Young J. Park

IPC分类号： H01L27/04 ,  H01L21/02 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108 ,  H01L21/70 ,  H01L27/00

CPC分类号： H01L27/10852 ,  H01L27/10817 ,  H01L28/90 ,  H01L28/92

摘要： A method for fabricating a capacitor of a dynamic random access memory cell having increased surface area and capacitance of its storage electrode which includes a plurality of vertical protrusions is disclosed. The capacitor includes an electrode plate electrically connected to a field effect transistor formed on a semiconductor substrate through interlayer insulating layers, a plurality of protrusions formed on the electrode plate, side walls respectively formed at side edges of the electrode plate, and a dielectric film and a plate electrode sequentially formed over the entire exposed surfaces of the electrode plate, the protrusions and the side walls.

摘要翻译： 公开了一种制造具有增加的包括多个垂直突起的存储电极的表面积和电容的动态随机存取存储器单元的电容器的方法。 电容器包括电极板，电极板通过层间绝缘层与形成在半导体衬底上的场效应晶体管电连接，形成在电极板上的多个突起，分别形成在电极板的侧边缘处的侧壁和介电膜以及 依次形成在电极板，突起和侧壁的整个暴露表面上的平板电极。