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    Half density ROM embedded DRAM
    1.
    发明授权
    Half density ROM embedded DRAM 失效
    半密度ROM嵌入式DRAM

    公开(公告)号：US06903957B2

    公开(公告)日：2005-06-07

    申请号：US10863070

    申请日：2004-06-08

    申请人： Scott Derner ,  Casey Kurth ,  Phillip G. Wald

    发明人： Scott Derner ,  Casey Kurth ,  Phillip G. Wald

    IPC分类号： G11C11/401 ,  G11C11/404 ,  G11C17/12 ,  G11C17/00

    CPC分类号： G11C11/404 ,  G11C17/12 ,  G11C2207/104

    摘要： A half-density ROM embedded DRAM uses hard programmed non-volatile cells and unprogrammed dynamic cells. By hard programming either a first or second memory cell in a pair of cell, different data states are stored. Two word lines are used to access the memory cell pair. Because one of the cells is hard programmed, sense amplifier circuitry identifies the appropriate data state. The ROM cell can be programmed in numerous different manners. For example, ROM cells can be hard programmed by eliminating cell dielectric to short cell plates to a program voltage, or an electrical plug can be fabricated between the cell plates and shorted to a program voltage. In other embodiments, the ROM cell can be programmed using an anti-fuse programming technique, or by providing a high leakage path (not full short) such as through an active area to the substrate.

    摘要翻译： 半密度ROM嵌入式DRAM使用硬编程的非易失性单元和未编程的动态单元。 通过对一对单元格中的第一或第二存储单元进行硬编程，存储不同的数据状态。 两条字线用于访问存储单元对。 因为其中一个单元是硬编程的，所以读出放大器电路识别适当的数据状态。 ROM单元可以以多种不同的方式进行编程。 例如，ROM单元可以通过将单元电池的电介质消除到编程电压来进行硬编程，或者可以在单元板之间制造电插头并且短路到编程电压。 在其他实施例中，ROM单元可以使用反熔丝编程技术进行编程，或者通过向衬底提供诸如通过有源区域的高泄漏路径（非完全短路）。

    Half density ROM embedded DRAM
    2.
    发明授权
    Half density ROM embedded DRAM 失效
    半密度ROM嵌入式DRAM

    公开(公告)号：US06747889B2

    公开(公告)日：2004-06-08

    申请号：US10017658

    申请日：2001-12-12

    申请人： Scott Derner ,  Casey Kurth ,  Phillip G. Wald

    发明人： Scott Derner ,  Casey Kurth ,  Phillip G. Wald

    IPC分类号： G11C1700

    CPC分类号： G11C11/404 ,  G11C17/12 ,  G11C2207/104

    摘要： A half-density ROM embedded DRAM uses hard programmed non-volatile cells and unprogrammed dynamic cells. By hard programming either a first or second memory cell in a pair of cell, different data states are stored. Two word lines are used to access the memory cell pair. Because one of the cells is hard programmed, sense amplifier circuitry identifies the appropriate data state. The ROM cell can be programmed in numerous different manners. For example, ROM cells can be hard programmed by eliminating cell dielectric to short cell plates to a program voltage, or an electrical plug can be fabricated between the cell plates and shorted to a program voltage. In other embodiments, the ROM cell can be programmed using an anti-fuse programming technique, or by providing a high leakage path (not full short) such as through an active area to the substrate.

    摘要翻译： 半密度ROM嵌入式DRAM使用硬编程的非易失性单元和未编程的动态单元。 通过对一对单元格中的第一或第二存储单元进行硬编程，存储不同的数据状态。 两条字线用于访问存储单元对。 因为其中一个单元是硬编程的，所以读出放大器电路识别适当的数据状态。 ROM单元可以以多种不同的方式进行编程。 例如，ROM单元可以通过将单元电池的电介质消除到编程电压来进行硬编程，或者可以在单元板之间制造电插头并且短路到编程电压。 在其他实施例中，ROM单元可以使用反熔丝编程技术进行编程，或者通过向衬底提供诸如通过有源区域的高泄漏路径（非完全短路）。

    ROM embedded DRAM with bias sensing
    3.
    发明授权
    ROM embedded DRAM with bias sensing 有权

    公开(公告)号：US06545899B1

    公开(公告)日：2003-04-08

    申请号：US10020371

    申请日：2001-12-12

    申请人： Scott Derner ,  Casey Kurth ,  Phillip G. Wald

    发明人： Scott Derner ,  Casey Kurth ,  Phillip G. Wald

    IPC分类号： G11C1700

    CPC分类号： G11C7/14 ,  G11C7/06 ,  G11C17/12 ,  G11C17/18 ,  G11C2207/104

    摘要： A ROM embedded DRAM that provides ROM cells that can be programmed to a single state. Bias techniques are used to read un-programmed ROM cells accurately. Sense amplifier circuitry can be offset in one embodiment to default to the un-programmed state. In another embodiment, bias circuitry is coupled to bit lines to favor the un-programmed state. Further, a differential pre-charge operation can also be used in another embodiment. The ROM embedded DRAM allows for simplifier fabrication and programming of the ROM cells, while providing accurate dual state functionality.

    ROM embedded DRAM with bias sensing
    4.
    发明授权
    ROM embedded DRAM with bias sensing 有权

    公开(公告)号：US06771529B2

    公开(公告)日：2004-08-03

    申请号：US10376768

    申请日：2003-02-28

    申请人： Scott Derner ,  Casey Kurth ,  Phillip G. Wald

    发明人： Scott Derner ,  Casey Kurth ,  Phillip G. Wald

    IPC分类号： G11C1700

    CPC分类号： G11C7/14 ,  G11C7/06 ,  G11C17/12 ,  G11C17/18 ,  G11C2207/104

    摘要： A ROM embedded DRAM that provides ROM cells that can be programmed to a single state. Bias techniques are used to read un-programmed ROM cells accurately. Sense amplifier circuitry can be offset in one embodiment to default to the un-programmed state. In another embodiment, bias circuitry is coupled to bit lines to favor the un-programmed state. Further, a differential pre-charge operation can also be used in another embodiment. The ROM embedded DRAM allows for simplifier fabrication and programming of the ROM cells, while providing accurate dual state functionality.

    DRAM with bias sensing
    6.
    发明授权
    DRAM with bias sensing 失效
    具有偏置感测的DRAM

    公开(公告)号：US06603693B2

    公开(公告)日：2003-08-05

    申请号：US10017868

    申请日：2001-12-12

    申请人： Scott Derner ,  Casey Kurth ,  Phillip G. Wald

    发明人： Scott Derner ,  Casey Kurth ,  Phillip G. Wald

    IPC分类号： G11C702

    CPC分类号： G11C7/14 ,  G11C11/4099

    摘要： A DRAM improves cell read margins using bias, or reference, circuitry. The reference circuitry is coupled to a complimentary digit line to improve a differential voltage with an active digit line. One embodiment, improves one's margin by decreasing the complimentary digit line voltage. The reference circuitry can be an un-programmed DRAM cell, a non-volatile ROM memory cell or a conductor coupled to a reference voltage.

    摘要翻译： DRAM使用偏置或参考电路来提高单元读取余量。 参考电路耦合到互补数字线，以利用有源数字线来提高差分电压。 一个实施例，通过减少补充数字线电压来提高余量。 参考电路可以是未编程的DRAM单元，非易失性ROM存储器单元或耦合到参考电压的导体。

    ROM embedded DRAM with programming
    9.
    发明授权
    ROM embedded DRAM with programming 有权
    ROM嵌入式DRAM与编程

    公开(公告)号：US06785167B2

    公开(公告)日：2004-08-31

    申请号：US10174746

    申请日：2002-06-18

    申请人： Casey Kurth ,  Scott Derner ,  Phillip G. Wald

    发明人： Casey Kurth ,  Scott Derner ,  Phillip G. Wald

    IPC分类号： G11C700

    CPC分类号： G11C11/005

    摘要： Programming efficiency of a read only memory (ROM) embedded dynamic random access memory (DRAM) is improved by programming only one polarity of bits in non-volatile cells of the ROM embedded DRAM, and then blanket programming volatile cells in the ROM embedded DRAM to represent the remaining bits.

    摘要翻译： 只读存储器（ROM）嵌入式动态随机存取存储器（DRAM）的编程效率通过仅对ROM嵌入式DRAM的非易失性单元中的位的一个极性进行编程而改进，然后将ROM嵌入式DRAM中的易失性单元进行橡皮布编程 表示剩余的位。

    ROM embedded DRAM with bias sensing
    10.
    发明授权
    ROM embedded DRAM with bias sensing 有权
    ROM嵌入式DRAM带偏置感测

    公开(公告)号：US06768664B2

    公开(公告)日：2004-07-27

    申请号：US10376730

    申请日：2003-02-28

    申请人： Scott Derner ,  Casey Kurth ,  Phillip G. Wald

    发明人： Scott Derner ,  Casey Kurth ,  Phillip G. Wald

    IPC分类号： G11C1700

    CPC分类号： G11C7/14 ,  G11C7/06 ,  G11C17/12 ,  G11C17/18 ,  G11C2207/104

    摘要： A ROM embedded DRAM that provides ROM cells that can be programmed to a single state. Bias techniques are used to read un-programmed ROM cells accurately. Sense amplifier circuitry can be offset in one embodiment to default to the un-programmed state. In another embodiment, bias circuitry is coupled to bit lines to favor the un-programmed state. Further, a differential pre-charge operation can also be used in another embodiment. The ROM embedded DRAM allows for simplifier fabrication and programming of the ROM cells, while providing accurate dual state functionality.

    摘要翻译： 一个ROM嵌入式DRAM，提供可以编程为单一状态的ROM单元。 偏置技术用于准确读取未编程的ROM单元。 在一个实施例中，感测放大器电路可以被偏移到默认的未编程状态。 在另一个实施例中，偏置电路耦合到位线以有利于未编程状态。 此外，差分预充电操作也可以在另一实施例中使用。 ROM嵌入式DRAM允许ROM细胞的简化制造和编程，同时提供精确的双重状态功能。