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    Method of forming capacitors having high-K oxygen containing capacitor dielectric layers, method of processing high-K oxygen containing dielectric layers, method of forming a DRAM cell having having high-K oxygen containing capacitor dielectric layers
    5.
    发明授权
    Method of forming capacitors having high-K oxygen containing capacitor dielectric layers, method of processing high-K oxygen containing dielectric layers, method of forming a DRAM cell having having high-K oxygen containing capacitor dielectric layers 失效
    包括制造电容器和DRAM单元的高K含氧电介质层的形成方法

    公开(公告)号：US6162744A

    公开(公告)日：2000-12-19

    申请号：US33064

    申请日：1998-02-28

    申请人： Husam N. Al-Shareef ,  Scott Jeffrey DeBoer ,  Randhir P. S. Thakur

    发明人： Husam N. Al-Shareef ,  Scott Jeffrey DeBoer ,  Randhir P. S. Thakur

    IPC分类号： H01L21/02 ,  H01L21/316 ,  H01L21/31 ,  H01L21/20 ,  H01L21/469

    CPC分类号： H01L28/40 ,  H01L21/31604 ,  H01L21/31691

    摘要： In a capacitor forming method, a first capacitor electrode is formed over a substrate. A high K oxygen containing capacitor dielectric layer is formed over the first capacitor electrode. A first annealing of the high K capacitor dielectric layer is conducted at a temperature of at least about 500.degree. C. in a substantially non-oxidizing atmosphere. After the first annealing, second annealing the high K capacitor dielectric layer occurs at a temperature of less than or equal to about 500.degree. C. in an oxidizing atmosphere. A second capacitor electrode is formed over the high K oxygen containing capacitor dielectric layer, preferably after the second annealing. In another considered implementation, the capacitor dielectric layer is annealed in multiple steps including at least two different temperatures. A second capacitor electrode is formed over the high K oxygen containing dielectric layer, with the substrate not being exposed to a gaseous oxygen containing atmosphere at a temperature of greater than about 500.degree. C. between the capacitor dielectric layer formation and formation of the second capacitor electrode. The invention also contemplates dielectric layer processing apart from capacitor formation, and the fabrication of DRAM circuitry.

    摘要翻译： 在电容器形成方法中，在基板上形成第一电容电极。 在第一电容器电极上形成高K含氧电容器电介质层。 高K电容介电层的第一退火在基本上非氧化性气氛中在至少约500℃的温度下进行。 在第一退火之后，在高K电容介电层的第二次退火在氧化气氛中在小于或等于约500℃的温度下发生。 优选在第二退火之后，在高K含氧电容器电介质层上形成第二电容器电极。 在另一个考虑的实施方案中，电容器介电层在包括至少两个不同温度的多个步骤中退火。 在高K含氧介电层上形成第二电容器电极，在电容器介电层形成和形成第二电容器之间，基板不暴露于大于约500℃的气态含氧气氛 电极。 本发明还考虑除电容器形成之外的介电层处理以及DRAM电路的制造。

    Methods of forming capacitors
    6.
    发明授权
    Methods of forming capacitors 失效
    形成电容器的方法

    公开(公告)号：US06773981B1

    公开(公告)日：2004-08-10

    申请号：US09630850

    申请日：2000-08-02

    申请人： Husam N. Al-Shareef ,  Scott Jeffrey DeBoer ,  F. Daniel Gealy ,  Randhir P. S. Thakur

    发明人： Husam N. Al-Shareef ,  Scott Jeffrey DeBoer ,  F. Daniel Gealy ,  Randhir P. S. Thakur

    IPC分类号： H01L218242

    CPC分类号： H01L28/40 ,  H01L21/31604 ,  H01L27/10852

    摘要： Capacitors and methods of forming capacitors are disclosed. In one implementation, a capacitor comprises a capacitor dielectric layer comprising Ta2O5 formed over a first capacitor electrode. A second capacitor electrode is formed over the Ta2O5 capacitor dielectric layer. Preferably, at least a portion of the second capacitor electrode is formed over and in contact with the Ta2O5 in an oxygen containing environment at a temperature of at least about 175° C. Chemical vapor deposition is one example forming method. The preferred second capacitor electrode comprises a conductive metal oxide. A more preferred second capacitor electrode comprises a conductive silicon comprising layer, over a conductive titanium comprising layer, over a conductive metal oxide layer. A preferred first capacitor electrode comprises a conductively doped Si—Ge alloy. Preferably, a Si3N4 layer is formed over the first capacitor electrode. DRAM cells and methods of forming DRAM cells are disclosed.

    摘要翻译： 公开了形成电容器的电容器和方法。 在一个实施方式中，电容器包括在第一电容器电极上形成的包括Ta 2 O 5的电容器介电层。 在Ta 2 O 5电容器电介质层上形成第二电容器电极。 优选地，第二电容器电极的至少一部分在含氧环境中在至少约175℃的温度下形成在Ta 2 O 5上方并与Ta 2 O 5接触。化学气相沉积是一种示例性形成方法。 优选的第二电容器电极包括导电金属氧化物。 更优选的第二电容器电极包括在导电金属氧化物层上方的导电硅包含层，在导电的钛包覆层之上。 优选的第一电容器电极包括导电掺杂的Si-Ge合金。 优选地，在第一电容器电极上形成Si 3 N 4层。 公开DRAM单元和形成DRAM单元的方法。

    Capacitor with conductively doped Si-Ge alloy electrode
    7.
    发明授权
    Capacitor with conductively doped Si-Ge alloy electrode 失效
    具有导电掺杂的Si-Ge合金电极的电容器

    公开(公告)号：US06400552B2

    公开(公告)日：2002-06-04

    申请号：US09846520

    申请日：2001-04-30

    申请人： Husam N. Al-Shareef ,  Scott Jeffrey DeBoer ,  F. Daniel Gealy ,  Randhir P. S. Thakur

    发明人： Husam N. Al-Shareef ,  Scott Jeffrey DeBoer ,  F. Daniel Gealy ,  Randhir P. S. Thakur

    IPC分类号： H01G406

    CPC分类号： H01L28/40 ,  H01L21/31604 ,  H01L27/10852

    摘要： Capacitors and methods of forming capacitors are disclosed. In one implementation, a capacitor includes a capacitor dielectric layer including Ta2O5 formed over a first capacitor electrode. A second capacitor electrode is formed over the Ta2O5 capacitor dielectric layer. Preferably, at least a portion of the second capacitor electrode is formed over and in contact with the Ta2O5 in an oxygen containing environment at a temperature of at least about 175° C. Chemical vapor deposition is one example forming method. The preferred second capacitor electrode includes a conductive metal oxide. A more preferred second capacitor electrode includes a conductive silicon including layer, over a conductive titanium including layer, over a conductive metal oxide layer. A preferred first capacitor electrode includes a conductively doped Si—Ge alloy. Preferably, a Si3N4 layer is formed over the first capacitor electrode. DRAM cells and methods of forming DRAM cells are disclosed.

    摘要翻译： 公开了形成电容器的电容器和方法。 在一个实施方式中，电容器包括在第一电容器电极上形成的包括Ta 2 O 5的电容器介电层。 在Ta 2 O 5电容器电介质层上形成第二电容器电极。 优选地，第二电容器电极的至少一部分在含氧环境中在至少约175℃的温度下形成在Ta 2 O 5上方并与Ta 2 O 5接触。化学气相沉积是一种示例性形成方法。 优选的第二电容器电极包括导电金属氧化物。 更优选的第二电容器电极在导电金属氧化物层之上包括在导电的钛包覆层之上的包括导电硅的层。 优选的第一电容器电极包括导电掺杂的Si-Ge合金。 优选地，在第一电容器电极上形成Si 3 N 4层。 公开DRAM单元和形成DRAM单元的方法。

    Capacitors, methods of forming capacitors, and DRAM memory cells
    8.
    发明授权
    Capacitors, methods of forming capacitors, and DRAM memory cells 失效
    电容器，形成电容器的方法和DRAM存储器单元

    公开(公告)号：US06191443B1

    公开(公告)日：2001-02-20

    申请号：US09033063

    申请日：1998-02-28

    申请人： Husam N. Al-Shareef ,  Scott Jeffrey DeBoer ,  F. Daniel Gealy ,  Randhir P. S. Thakur

    发明人： Husam N. Al-Shareef ,  Scott Jeffrey DeBoer ,  F. Daniel Gealy ,  Randhir P. S. Thakur

    IPC分类号： H01L2972

    CPC分类号： H01L28/40 ,  H01L21/31604 ,  H01L27/10852

    摘要： Capacitors and methods of forming capacitors are disclosed. In one implementation, a capacitor comprises a capacitor dielectric layer comprising Ta2O5 formed over a first capacitor electrode. A second capacitor electrode is formed over the Ta2O5 capacitor dielectric layer. Preferably, at least a portion of the second capacitor electrode is formed over and in contact with the Ta2O5 in an oxygen containing environment at a temperature of at least about 175° C. Chemical vapor deposition is one example forming method. The preferred second capacitor electrode comprises a conductive metal oxide. A more preferred second capacitor electrode comprises a conductive silicon comprising layer, over a conductive titanium comprising layer, over a conductive metal oxide layer. A preferred first capacitor electrode comprises a conductively doped Si-Ge alloy. Preferably, a Si3N4 layer is formed over the first capacitor electrode. DRAM cells and methods of forming DRAM cells are disclosed.

    摘要翻译： 公开了形成电容器的电容器和方法。 在一个实施方式中，电容器包括在第一电容器电极上形成的包括Ta 2 O 5的电容器介电层。 在Ta 2 O 5电容器电介质层上形成第二电容器电极。 优选地，第二电容器电极的至少一部分在含氧环境中在至少约175℃的温度下形成在Ta 2 O 5上方并与Ta 2 O 5接触。化学气相沉积是一种示例性形成方法。 优选的第二电容器电极包括导电金属氧化物。 更优选的第二电容器电极包括在导电金属氧化物层上方的导电硅包含层，在导电的钛包覆层之上。 优选的第一电容器电极包括导电掺杂的Si-Ge合金。 优选地，在第一电容器电极上形成Si 3 N 4层。 公开DRAM单元和形成DRAM单元的方法。

    Method of processing internal surfaces of a chemical vapor deposition reactor
    9.
    发明授权
    Method of processing internal surfaces of a chemical vapor deposition reactor 失效

    公开(公告)号：US6082375A

    公开(公告)日：2000-07-04

    申请号：US83258

    申请日：1998-05-21

    申请人： F. Daniel Gealy ,  Husam N. Al-Shareef ,  Scott Jeffrey DeBoer

    发明人： F. Daniel Gealy ,  Husam N. Al-Shareef ,  Scott Jeffrey DeBoer

    IPC分类号： C23C16/44 ,  C25F3/12

    CPC分类号： C23C16/4405 ,  Y10S438/905 ,  Y10S438/911

    摘要： The invention encompasses methods of processing internal surfaces of a chemical vapor deposition reactor. In one implementation, material is deposited over internal surfaces of a chemical vapor deposition reactor while processing semiconductor substrates therein. The deposited material is treated with atomic oxygen. After the treating, at least some of the deposited material is etched from the reactor internal surfaces. In one embodiment, first etching is conducted of some of the deposited material from the reactor internal surfaces. After the first etching, remaining deposited material is treated with atomic oxygen. After the treating, second etching is conducted of at least some of the remaining deposited material from the reactor internal surfaces. In one embodiment, the deposited material is first treated with atomic oxygen. After the first treating, first etching is conducted of some of the deposited material from the reactor internal surfaces. After the first etching, second treating is conducted of remaining deposited material with atomic oxygen. After the second treating, second etching is conducted of at least some of the remaining deposited material from the reactor internal surfaces.

    Method of processing internal surfaces of a chemical vapor deposition reactor
    10.
    发明授权
    Method of processing internal surfaces of a chemical vapor deposition reactor 失效
    处理化学气相沉积反应器内表面的方法

    公开(公告)号：US06610211B1

    公开(公告)日：2003-08-26

    申请号：US09516422

    申请日：2000-03-01

    申请人： F. Daniel Gealy ,  Husam N. Al-Shareef ,  Scott Jeffrey DeBoer

    发明人： F. Daniel Gealy ,  Husam N. Al-Shareef ,  Scott Jeffrey DeBoer

    IPC分类号： B08B940

    CPC分类号： C23C16/4405 ,  Y10S438/905 ,  Y10S438/911

    摘要： The invention encompasses methods of processing internal surfaces of a chemical vapor deposition reactor. In one implementation, material is deposited over internal surfaces of a chemical vapor deposition reactor while processing semiconductor substrates therein. The deposited material is treated with atomic oxygen. After the treating, at least some of the deposited material is etched from the reactor internal surfaces. In one embodiment, first etching is conducted of some of the deposited material from the reactor internal surfaces. After the first etching, remaining deposited material is treated with atomic oxygen. After the treating, second etching is conducted of at least some of the remaining deposited material from the reactor internal surfaces. In one embodiment, the deposited material is first treated with atomic oxygen. After the first treating, first etching is conducted of some of the deposited material from the reactor internal surfaces. After the first etching, second treating is conducted of remaining deposited material with atomic oxygen. After the second treating, second etching is conducted of at least some of the remaining deposited material from the reactor internal surfaces.

    摘要翻译： 本发明包括处理化学气相沉积反应器的内表面的方法。 在一个实施方式中，材料沉积在化学气相沉积反应器的内表面上，同时在其中处理半导体衬底。 沉积的材料用原子氧处理。 在处理之后，从反应器内表面蚀刻至少一些沉积的材料。 在一个实施例中，从反应器内表面进行一些沉积材料的第一蚀刻。 在第一蚀刻之后，用原子氧处理剩余的沉积材料。 在处理之后，对来自反应器内表面的至少一些剩余的沉积材料进行第二蚀刻。 在一个实施例中，首先用原子氧处理沉积的材料。 在第一次处理之后，从反应器内表面进行一些沉积材料的第一蚀刻。 在第一蚀刻之后，用原子氧进行剩余的沉积材料的第二次处理。 在第二次处理之后，从反应器内表面进行至少一些剩余的沉积材料的第二蚀刻。