Floating source line architecture for non-volatile memory
    1.
    发明授权
    Floating source line architecture for non-volatile memory 有权
    用于非易失性存储器的浮动源线架构

    公开(公告)号:US08582347B2

    公开(公告)日:2013-11-12

    申请号:US13751592

    申请日:2013-01-28

    Abstract: A method and apparatus for writing data to a non-volatile memory cell, such as an STRAM memory cell or an RRAM memory cell. In some embodiments, a plurality of N non-volatile memory cells, where N is a greater than two, are connected to a common floating source line. A write circuit is adapted to program a selected memory cell of the plurality to a selected data state by passing a write current of selected magnitude through the selected memory cell and concurrently passing a portion of the write current in parallel through each of the remaining N−1 memory cells of the plurality via the common floating source line.

    Abstract translation: 用于将数据写入诸如STRAM存储器单元或RRAM存储器单元的非易失性存储单元的方法和装置。 在一些实施例中,其中N大于2的多个N个非易失性存储器单元连接到公共的浮动源线。 写入电路适于通过将所选择的大小的写入电流通过所选择的存储器单元来编程所选择的数据状态的所选择的存储单元,并且并行地通过所述剩余的N- 1个存储单元经由公共浮动源线。

    Floating Source Line Architecture for Non-Volatile Memory
    2.
    发明申请
    Floating Source Line Architecture for Non-Volatile Memory 有权
    非易失性存储器的浮动源线架构

    公开(公告)号:US20130135922A1

    公开(公告)日:2013-05-30

    申请号:US13751592

    申请日:2013-01-28

    Abstract: A method and apparatus for writing data to a non-volatile memory cell, such as an STRAM memory cell or an RRAM memory cell. In some embodiments, a plurality of N non-volatile memory cells, where N is a greater than two, are connected to a common floating source line. A write circuit is adapted to program a selected memory cell of the plurality to a selected data state by passing a write current of selected magnitude through the selected memory cell and concurrently passing a portion of the write current in parallel through each of the remaining N−1 memory cells of the plurality via the common floating source line.

    Abstract translation: 用于将数据写入诸如STRAM存储器单元或RRAM存储器单元的非易失性存储单元的方法和装置。 在一些实施例中,其中N大于2的多个N个非易失性存储器单元连接到公共的浮动源线。 写入电路适于通过将所选择的大小的写入电流通过所选择的存储器单元来编程所选择的数据状态的所选择的存储单元,并且并行地通过所述剩余的N- 1个存储单元经由公共浮动源线。

    Data updating in non-volatile memory

    公开(公告)号:US10684778B2

    公开(公告)日:2020-06-16

    申请号:US14846411

    申请日:2015-09-04

    Abstract: Various embodiments of the present invention are generally directed to an apparatus and associated method for updating data in a non-volatile memory array. In accordance with some embodiments, a memory block is formed with a plurality of types of memory cell sectors arranged in data pages of a first type and log pages of a second type that can be updated in-place. A first updated sector is written to a first log page while maintaining an outdated sector in an original data page, and overwritten with a second updated sector.

    Data Updating in Non-Volatile Memory
    4.
    发明申请
    Data Updating in Non-Volatile Memory 审中-公开
    非易失性存储器中的数据更新

    公开(公告)号:US20150378607A1

    公开(公告)日:2015-12-31

    申请号:US14846411

    申请日:2015-09-04

    Abstract: Various embodiments of the present invention are generally directed to an apparatus and associated method for updating data in a non-volatile memory array. In accordance with some embodiments, a memory block is formed with a plurality of types of memory cell sectors arranged in data pages of a first type and log pages of a second type that can be updated in-place. A first updated sector is written to a first log page while maintaining an outdated sector in an original data page, and overwritten with a second updated sector.

    Abstract translation: 本发明的各种实施例通常涉及用于更新非易失性存储器阵列中的数据的装置和相关联的方法。 根据一些实施例,存储器块形成有布置在第一类型的数据页中的多种类型的存储器单元扇区和可以就地更新的第二类型的日志页。 将第一更新的扇区写入第一日志页面,同时保持原始数据页面中的过时扇区,并被第二更新扇区覆盖。

Patent Agency Ranking