Abstract:
Provided is a power supply switching circuit capable of suppressing a load fluctuation such as undershoot that occurs at an output terminal at the time of power supply switching. The power supply switching circuit includes: a battery connected to the output terminal; a replica current generation circuit for generating a replica current that is proportional to a current flowing from the battery to the output terminal; a voltage regulator connected to the output terminal, the voltage regulator including a reference voltage circuit, an error amplifier circuit, an output transistor, and a voltage divider circuit; and a current mirror circuit for causing the replica current to flow through the output transistor of the voltage regulator.
Abstract:
Provided is an overheat detection circuit configured to accurately detect a temperature of a semiconductor device even at high temperature and thus avoid outputting an erroneous detection result. The overheat detection circuit includes: a PN junction element, being a temperature sensitive element; a constant current circuit configured to supply the PN junction element with a bias current; a comparator configured to compare a voltage generated at the PN junction element and a reference voltage; a second PN junction element configured to cause a leakage current to flow through a reference voltage circuit at high temperature; and a third PN junction element configured to bypass a leakage current of the constant current circuit at the high temperature.
Abstract:
Provided is a power supply voltage monitoring circuit capable of accurately detecting a power supply voltage with a small circuit scale and low power consumption. The power supply voltage monitoring circuit includes: a signal output circuit configured to output a signal voltage representing saturation characteristics with respect to an increase in power supply voltage; and a signal voltage monitoring circuit configured to output a signal representing that the signal voltage of the signal output circuit is normal, the signal voltage monitoring circuit including: a PMOS transistor including a gate connected to an output terminal of the signal output circuit; a first constant current circuit connected to a drain of the PMOS transistor; and an inverter including an input terminal connected to the drain of the PMOS transistor.
Abstract:
Provided is a detection circuit configured to avoid erroneous detection that may occur immediately after a detection circuit is powered on. The detection circuit includes: an output transistor connected between a voltage input terminal and a voltage output terminal; and a load open-circuit detection circuit configured to detect an open circuit of a load connected to the voltage output terminal, in which an output circuit of the load open-circuit detection circuit includes a first transistor and a second transistor connected in series, the first transistor having a gate connected to the output transistor in common, the second transistor having a gate to which a signal indicating that the open-circuit of the load is detected, and in which the first transistor is in an off state when the output transistor is in an off state.
Abstract:
There is provided a level shift circuit free from malfunction. The level shift circuit converts a signal of a first power supply voltage of a first supply terminal, which is supplied to an input terminal, into a signal of a second power supply voltage of a second supply terminal and outputs the converted signal to an output terminal. The level shift circuit has a control circuit that detects when the first power supply voltage reduces below a predetermined voltage. The voltage of the output terminal of the level shift circuit is fixed to the second power supply voltage or a ground voltage according to a detection signal of the control circuit.