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    THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF
    1.
    发明申请
    THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF 审中-公开
    薄膜晶体管阵列及其制造方法

    公开(公告)号：US20120228604A1

    公开(公告)日：2012-09-13

    申请号：US13400931

    申请日：2012-02-21

    申请人： Seung-Ha CHOI ,  Sung Haeng CHO ,  Woo Geun LEE ,  Kap Soo YOON ,  Sho Yeon KIM

    发明人： Seung-Ha CHOI ,  Sung Haeng CHO ,  Woo Geun LEE ,  Kap Soo YOON ,  Sho Yeon KIM

    IPC分类号： H01L29/786 ,  H01L21/336

    CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L27/1288

    摘要： A thin film transistor array panel includes a gate electrode on an insulating substrate, a gate insulating layer on the gate electrode, a semiconductor on the gate insulating layer, a thin film transistor including a source electrode and a drain electrode on the oxide semiconductor, and a pixel electrode which is connected to the drain electrode. The semiconductor includes a first layer having a relatively low fluorine content and a second layer having a relatively high fluorine content. The second layer of the semiconductor is only between the first layer of the semiconductor and the source electrode, and between the first layer of the semiconductor and the drain electrode.

    摘要翻译： 薄膜晶体管阵列面板包括绝缘基板上的栅极电极，栅电极上的栅极绝缘层，栅极绝缘层上的半导体，氧化物半导体上包括源电极和漏电极的薄膜晶体管，以及 连接到漏电极的像素电极。 半导体包括具有相对低的氟含量的第一层和具有相对高的氟含量的第二层。 半导体的第二层仅在半导体的第一层和源电极之间以及半导体的第一层和漏电极之间。

    THIN FILM TRANSISTOR ARRAY PANEL
    2.
    发明申请
    THIN FILM TRANSISTOR ARRAY PANEL 审中-公开
    薄膜晶体管阵列

    公开(公告)号：US20120146029A1

    公开(公告)日：2012-06-14

    申请号：US13185105

    申请日：2011-07-18

    申请人： Young Joo CHOI ,  Woo Geun LEE ,  Kap Soo YOON ,  Ki-Won KIM ,  Sang Wan JIN ,  Jae Won SONG ,  Zhu Xun

    发明人： Young Joo CHOI ,  Woo Geun LEE ,  Kap Soo YOON ,  Ki-Won KIM ,  Sang Wan JIN ,  Jae Won SONG ,  Zhu Xun

    IPC分类号： H01L29/786

    CPC分类号： H01L27/1225 ,  G02F1/1368 ,  H01L29/41733 ,  H01L29/4908

    摘要： A thin film transistor array panel includes an insulating substrate, a gate line disposed on the insulating substrate having a gate electrode, a first gate insulating layer disposed on the gate line and made of silicon nitride, a second gate insulating layer disposed on the first gate insulating layer and made of silicon oxide, an oxide semiconductor disposed on the second gate insulating layer, a data line disposed on the oxide semiconductor and having a source electrode, a drain electrode disposed on the oxide semiconductor and facing the source electrode, and a pixel electrode that is connected to the drain electrode. A thickness of the second gate insulating layer may range from 200 Å to less than 500 Å.

    摘要翻译： 薄膜晶体管阵列面板包括绝缘基板，设置在具有栅电极的绝缘基板上的栅极线，设置在栅极线上并由氮化硅制成的第一栅极绝缘层，设置在第一栅极上的第二栅极绝缘层 绝缘层，由氧化硅制成，设置在第二栅极绝缘层上的氧化物半导体，设置在氧化物半导体上的数据线，具有源电极，设置在氧化物半导体上并面对源电极的漏极，以及像素 连接到漏电极的电极。 第二栅极绝缘层的厚度可以在200至小于500的范围内。

    THIN FILM TRANSISTOR DISPLAY PANEL AND MANUFACTURING METHOD THEREOF
    3.
    发明申请
    THIN FILM TRANSISTOR DISPLAY PANEL AND MANUFACTURING METHOD THEREOF 有权
    薄膜晶体管显示面板及其制造方法

    公开(公告)号：US20130146864A1

    公开(公告)日：2013-06-13

    申请号：US13464613

    申请日：2012-05-04

    申请人： Ki-Won KIM ,  Kap Soo YOON ,  Woo Geun LEE ,  Jin-Won LEE ,  Se-Myung KWON ,  Jung Ouck AHN ,  Si Jin KIM

    发明人： Ki-Won KIM ,  Kap Soo YOON ,  Woo Geun LEE ,  Jin-Won LEE ,  Se-Myung KWON ,  Jung Ouck AHN ,  Si Jin KIM

    IPC分类号： H01L29/786 ,  H01L33/08 ,  H01L21/336

    CPC分类号： H01L29/41733 ,  H01L27/1225 ,  H01L27/1259 ,  H01L29/66765 ,  H01L29/78696

    摘要： A method for manufacturing a thin film transistor array panel includes forming a gate line and a gate electrode protruding from the gate line on a substrate; forming a gate insulating layer on the gate line and the gate electrode; depositing sequentially a semiconductor material and a metal material on the gate insulating layer; performing a first etching operation on the semiconductor material and the metal material using a first mask to form a semiconductor layer and a metal layer, the metal layer including a data line, a source electrode, and a drain electrode, in which the drain electrode protrudes from the data line, and the source electrode and the drain electrode having an integral shape; and performing a second etching operation on the metal layer using a second mask to divide the source electrode and the drain electrode.

    摘要翻译： 一种制造薄膜晶体管阵列面板的方法，包括：在基板上形成从栅极线突出的栅极线和栅电极; 在栅极线和栅电极上形成栅极绝缘层; 在栅极绝缘层上依次沉积半导体材料和金属材料; 使用第一掩模对所述半导体材料和所述金属材料进行第一蚀刻操作以形成半导体层和金属层，所述金属层包括数据线，源电极和漏电极，其中所述漏电极突出 数据线，源电极和漏电极具有整体形状; 以及使用第二掩模对所述金属层进行第二蚀刻操作以分割所述源电极和所述漏电极。

    THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF
    4.
    发明申请
    THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF 有权
    薄膜晶体管阵列及其制造方法

    公开(公告)号：US20130214299A1

    公开(公告)日：2013-08-22

    申请号：US13618308

    申请日：2012-09-14

    申请人： Hye Young RYU ,  Hee Jun BYEON ,  Woo Geun LEE ,  Kap Soo YOON ,  Yoon Ho KIM ,  Chun Won BYUN

    发明人： Hye Young RYU ,  Hee Jun BYEON ,  Woo Geun LEE ,  Kap Soo YOON ,  Yoon Ho KIM ,  Chun Won BYUN

    IPC分类号： H01L29/786 ,  H01L21/336

    CPC分类号： H01L27/127 ,  G02F1/134363 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136222 ,  G02F2001/136295 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1262

    摘要： A thin film transistor array panel and a manufacturing method thereof according to an exemplary embodiment of the present invention form a contact hole in a second passivation layer formed of an organic insulator, protect a side of the contact hole by covering with a protection member formed of the same layer as the first field generating electrode and formed of a transparent conductive material, and etch the first passivation layer below the second passivation layer using the protection member as a mask. Therefore, it is possible to prevent the second passivation layer formed of an organic insulator from being overetched while etching the insulating layer below the second passivation layer so that the contact hole is prevented from being made excessively wide.

    摘要翻译： 根据本发明的示例性实施例的薄膜晶体管阵列面板及其制造方法在由有机绝缘体形成的第二钝化层中形成接触孔，通过用由保护构件形成的保护构件覆盖来保护接触孔的一侧 与第一场产生电极相同的层并由透明导电材料形成，并且使用保护构件作为掩模，将第二钝化层下面的第一钝化层蚀刻。 因此，可以防止由有机绝缘体形成的第二钝化层在蚀刻第二钝化层下方的绝缘层的同时进行过蚀刻，从而防止接触孔过宽。