-
公开(公告)号：US09324866B2
公开(公告)日：2016-04-26
申请号：US13356235
申请日：2012-01-23
申请人： Shao-Ming Yu , Chang-Yun Chang , Chih-Hao Chang , Hsin-Chih Chen , Kai-Tai Chang , Ming-Feng Shieh , Kuei-Liang Lu , Yi-Tang Lin
发明人： Shao-Ming Yu , Chang-Yun Chang , Chih-Hao Chang , Hsin-Chih Chen , Kai-Tai Chang , Ming-Feng Shieh , Kuei-Liang Lu , Yi-Tang Lin
IPC分类号： H01L21/8238 , H01L27/092 , H01L29/78 , H01L29/417 , H01L29/66
CPC分类号： H01L29/7848 , H01L21/823807 , H01L21/823814 , H01L21/823821 , H01L21/823878 , H01L29/0653 , H01L29/0847 , H01L29/1608 , H01L29/161 , H01L29/165 , H01L29/41783 , H01L29/41791 , H01L29/66545 , H01L29/66636 , H01L29/66795 , H01L29/785
摘要： The present disclosure provides a semiconductor structure. The semiconductor structure includes a semiconductor substrate; an isolation feature formed in the semiconductor substrate; a first active region and a second active region formed in the semiconductor substrate, wherein the first and second active regions extend in a first direction and are separated from each other by the isolation feature; and a dummy gate disposed on the isolation feature, wherein the dummy gate extends in the first direction to the first active region from one side and to the second active region from another side.
摘要翻译： 本公开提供了一种半导体结构。 半导体结构包括半导体衬底; 形成在半导体衬底中的隔离特征; 形成在所述半导体衬底中的第一有源区和第二有源区，其中所述第一和第二有源区在第一方向上延伸并且通过隔离特征彼此分离; 以及设置在所述隔离特征上的伪栅极，其中所述伪栅极在第一方向上从另一侧的一侧延伸到所述第一有源区域并且从另一侧向所述第二有源区域延伸。
-
公开(公告)号：US20130187237A1
公开(公告)日：2013-07-25
申请号：US13356235
申请日：2012-01-23
申请人： Shao-Ming Yu , Chang-Yun Chang , Chih-Hao Chang , Hsin-Chih Chen , Kai-Tai Chang , Ming-Feng Shieh , Kuei-Liang Lu , Yi-Tang Lin
发明人： Shao-Ming Yu , Chang-Yun Chang , Chih-Hao Chang , Hsin-Chih Chen , Kai-Tai Chang , Ming-Feng Shieh , Kuei-Liang Lu , Yi-Tang Lin
IPC分类号： H01L27/092 , H01L21/8238
CPC分类号： H01L29/7848 , H01L21/823807 , H01L21/823814 , H01L21/823821 , H01L21/823878 , H01L29/0653 , H01L29/0847 , H01L29/1608 , H01L29/161 , H01L29/165 , H01L29/41783 , H01L29/41791 , H01L29/66545 , H01L29/66636 , H01L29/66795 , H01L29/785
摘要： The present disclosure provides a semiconductor structure. The semiconductor structure includes a semiconductor substrate; an isolation feature formed in the semiconductor substrate; a first active region and a second active region formed in the semiconductor substrate, wherein the first and second active regions extend in a first direction and are separated from each other by the isolation feature; and a dummy gate disposed on the isolation feature, wherein the dummy gate extends in the first direction to the first active region from one side and to the second active region from another side.
摘要翻译： 本公开提供了一种半导体结构。 半导体结构包括半导体衬底; 形成在半导体衬底中的隔离特征; 形成在所述半导体衬底中的第一有源区和第二有源区，其中所述第一和第二有源区在第一方向上延伸并且通过隔离特征彼此分离; 以及设置在所述隔离特征上的伪栅极，其中所述伪栅极在第一方向上从另一侧的一侧延伸到所述第一有源区域并且从另一侧向所述第二有源区域延伸。
-
公开(公告)号：US20120021589A1
公开(公告)日：2012-01-26
申请号：US13248932
申请日：2011-09-29
申请人： Ming-Feng Shieh , Shinn-Sheng Yu , Anthony Yen , Shao-Ming Yu , Chang-Yun Chang , Jeff J. Xu , Clement Hsingjen Wann
发明人： Ming-Feng Shieh , Shinn-Sheng Yu , Anthony Yen , Shao-Ming Yu , Chang-Yun Chang , Jeff J. Xu , Clement Hsingjen Wann
IPC分类号： H01L21/311 , H01L21/30
CPC分类号： H01L27/0203 , G03F1/00 , G03F1/36 , H01L21/3086 , H01L21/823431 , H01L29/66795
摘要： Provided is a photolithography apparatus including a photomask. The photomask includes a pattern having a plurality of features, in an example, dummy line features. The pattern includes a first region being in the form of a localized on-grid array and a second region where at least one of the features has an increased width. The apparatus may include a second photomask which may define an active region. The feature with an increased width may be adjacent, and outside, the defined active region.
摘要翻译： 提供了一种包括光掩模的光刻设备。 光掩模包括具有多个特征的图案，在示例中为虚线特征。 该图案包括呈局部网格阵列形式的第一区域和其中至少一个特征具有增加的宽度的第二区域。 该装置可以包括可以限定有源区域的第二光掩模。 具有增加的宽度的特征可以与所定义的有效区域相邻并且在外部。
-
公开(公告)号：US20100183961A1
公开(公告)日：2010-07-22
申请号：US12356405
申请日：2009-01-20
申请人： Ming-Feng Shieh , Shinn-Sheng Yu , Anthony Yen , Shao-Ming Yu , Chang-Yun Chang , Jeff J. Xu , Clement Hsingjen Wann
发明人： Ming-Feng Shieh , Shinn-Sheng Yu , Anthony Yen , Shao-Ming Yu , Chang-Yun Chang , Jeff J. Xu , Clement Hsingjen Wann
CPC分类号： H01L27/0203 , G03F1/00 , G03F1/36 , H01L21/3086 , H01L21/823431 , H01L29/66795
摘要： Provided is a method including layout design of an integrated circuit. A first pattern is provided. The first pattern includes an array of dummy line features and a plurality of spacer elements abutting the dummy line features. A second pattern is provided. The second pattern defines an active region of an integrated circuit device. An edge spacer element of the active region is determined. A dummy line feature of the array of dummy line features is biased (e.g., increased in width), the dummy line feature is adjacent an edge spacer element.
摘要翻译： 提供了一种包括集成电路的布局设计的方法。 提供了第一种模式。 第一图案包括虚线特征的阵列和与虚线特征相邻的多个间隔元件。 提供了第二种模式。 第二图案定义了集成电路器件的有源区。 确定有源区的边缘间隔元件。 假线特征阵列的虚线特征被偏置（例如，宽度增加），虚线特征与边缘间隔元件相邻。
-
公开(公告)号：US07862962B2
公开(公告)日：2011-01-04
申请号：US12356405
申请日：2009-01-20
申请人： Ming-Feng Shieh , Shinn-Sheng Yu , Anthony Yen , Shao-Ming Yu , Chang-Yun Chang , Jeff J. Xu , Clement Hsingjen Wann
发明人： Ming-Feng Shieh , Shinn-Sheng Yu , Anthony Yen , Shao-Ming Yu , Chang-Yun Chang , Jeff J. Xu , Clement Hsingjen Wann
CPC分类号： H01L27/0203 , G03F1/00 , G03F1/36 , H01L21/3086 , H01L21/823431 , H01L29/66795
摘要： Provided is a method including layout design of an integrated circuit. A first pattern is provided. The first pattern includes an array of dummy line features and a plurality of spacer elements abutting the dummy line features. A second pattern is provided. The second pattern defines an active region of an integrated circuit device. An edge spacer element of the active region is determined. A dummy line feature of the array of dummy line features is biased (e.g., increased in width), the dummy line feature is adjacent an edge spacer element.
摘要翻译： 提供了一种包括集成电路的布局设计的方法。 提供了第一种模式。 第一图案包括虚线特征的阵列和与虚线特征相邻的多个间隔元件。 提供了第二种模式。 第二图案定义了集成电路器件的有源区。 确定有源区的边缘间隔元件。 假线特征阵列的虚线特征被偏置（例如，宽度增加），虚线特征与边缘间隔元件相邻。
-
公开(公告)号：US08241823B2
公开(公告)日：2012-08-14
申请号：US13248932
申请日：2011-09-29
申请人： Ming-Feng Shieh , Shinn-Sheng Yu , Anthony Yen , Shao-Ming Yu , Chang-Yun Chang , Jeff J. Xu , Clement Hsingjen Wann
发明人： Ming-Feng Shieh , Shinn-Sheng Yu , Anthony Yen , Shao-Ming Yu , Chang-Yun Chang , Jeff J. Xu , Clement Hsingjen Wann
IPC分类号： G03G5/00 , H01L21/302 , H01L21/461
CPC分类号： H01L27/0203 , G03F1/00 , G03F1/36 , H01L21/3086 , H01L21/823431 , H01L29/66795
摘要： Provided is a photolithography apparatus including a photomask. The photomask includes a pattern having a plurality of features, in an example, dummy line features. The pattern includes a first region being in the form of a localized on-grid array and a second region where at least one of the features has an increased width. The apparatus may include a second photomask which may define an active region. The feature with an increased width may be adjacent, and outside, the defined active region.
摘要翻译： 提供了一种包括光掩模的光刻设备。 光掩模包括具有多个特征的图案，在示例中为虚线特征。 该图案包括呈局部网格阵列形式的第一区域和其中至少一个特征具有增加的宽度的第二区域。 该装置可以包括可以限定有源区域的第二光掩模。 具有增加的宽度的特征可以与所定义的有效区域相邻并且在外部。
-
公开(公告)号：US08039179B2
公开(公告)日：2011-10-18
申请号：US12980764
申请日：2010-12-29
申请人： Ming-Feng Shieh , Shinn-Sheng Yu , Anthony Yen , Shao-Ming Yu , Chang-Yun Chang , Jeff J. Xu , Clement Hsingjen Wann
发明人： Ming-Feng Shieh , Shinn-Sheng Yu , Anthony Yen , Shao-Ming Yu , Chang-Yun Chang , Jeff J. Xu , Clement Hsingjen Wann
CPC分类号： H01L27/0203 , G03F1/00 , G03F1/36 , H01L21/3086 , H01L21/823431 , H01L29/66795
摘要： Provided is a photolithography apparatus including a photomask. The photomask includes a pattern having a plurality, of features, in an example, dummy line features. The pattern includes a first region being in the form of a localized on-grid array and a second region where at least one of the features has an increased width. The apparatus may include a second photomask which may define an active region. The feature with an increased width may be adjacent, and outside, the defined active region.
摘要翻译： 提供了一种包括光掩模的光刻设备。 光掩模包括具有多个特征的图案，在示例中为假线特征。 该图案包括呈局部网格阵列形式的第一区域和其中至少一个特征具有增加的宽度的第二区域。 该装置可以包括可以限定有源区域的第二光掩模。 具有增加的宽度的特征可以与所定义的有效区域相邻并且在外部。
-
公开(公告)号：US20110151359A1
公开(公告)日：2011-06-23
申请号：US12980764
申请日：2010-12-29
申请人： Ming-Feng Shieh , Shinn-Sheng Yu , Anthony Yen , Shao-Ming Yu , Chang-Yun Chang , Jeff J. Xu , Clement Hsingjen Wann
发明人： Ming-Feng Shieh , Shinn-Sheng Yu , Anthony Yen , Shao-Ming Yu , Chang-Yun Chang , Jeff J. Xu , Clement Hsingjen Wann
CPC分类号： H01L27/0203 , G03F1/00 , G03F1/36 , H01L21/3086 , H01L21/823431 , H01L29/66795
摘要： Provided is a photolithography apparatus including a photomask. The photomask includes a pattern having a plurality, of features, in an example, dummy line features. The pattern includes a first region being in the form of a localized on-grid array and a second region where at least one of the features has an increased width. The apparatus may include a second photomask which may define an active region. The feature with an increased width may be adjacent, and outside, the defined active region.
摘要翻译： 提供了一种包括光掩模的光刻设备。 光掩模包括具有多个特征的图案，在示例中为假线特征。 该图案包括呈局部网格阵列形式的第一区域和其中至少一个特征具有增加的宽度的第二区域。 该装置可以包括可以限定有源区域的第二光掩模。 具有增加的宽度的特征可以与所定义的有效区域相邻并且在外部。
-
公开(公告)号：US20130210212A1
公开(公告)日：2013-08-15
申请号：US13396515
申请日：2012-02-14
申请人： Chih-Hui Weng , Wei-Sheng Yun , Shao-Ming Yu , Hsin-Chih Chen , Chih-Hsin Ko , Clement Hsingjen Wann
发明人： Chih-Hui Weng , Wei-Sheng Yun , Shao-Ming Yu , Hsin-Chih Chen , Chih-Hsin Ko , Clement Hsingjen Wann
CPC分类号： H01L21/823412 , H01L21/3083 , H01L21/32 , H01L21/823418 , H01L21/823481 , H01L25/50 , H01L29/1054 , H01L29/66651 , H01L29/78 , H01L2924/0002 , H01L2924/00
摘要： Methods of manufacturing semiconductor devices are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes providing a workpiece, and forming a protective material over a bottom surface and edges of the workpiece. A top surface of the workpiece is processed. The protective material protects the edges and the bottom surface of the workpiece during the processing of the top surface of the workpiece.
摘要翻译： 公开了制造半导体器件的方法。 在一个实施例中，制造半导体器件的方法包括提供工件，以及在工件的底表面和边缘上形成保护材料。 加工工件的顶面。 保护材料在加工工件的上表面时保护工件的边缘和底面。
-
10.发明授权Methods of manufacturing semiconductor devices including use of a protective material 有权制造包括使用保护材料的半导体器件的方法公开(公告)号：US08809202B2
公开(公告)日：2014-08-19
申请号：US13396515
申请日：2012-02-14
申请人： Chih-Hui Weng , Wei-Sheng Yun , Shao-Ming Yu , Hsin-Chih Chen , Chih-Hsin Ko , Clement Hsingjen Wann
发明人： Chih-Hui Weng , Wei-Sheng Yun , Shao-Ming Yu , Hsin-Chih Chen , Chih-Hsin Ko , Clement Hsingjen Wann
IPC分类号： H01L21/31
CPC分类号： H01L21/823412 , H01L21/3083 , H01L21/32 , H01L21/823418 , H01L21/823481 , H01L25/50 , H01L29/1054 , H01L29/66651 , H01L29/78 , H01L2924/0002 , H01L2924/00
摘要： Methods of manufacturing semiconductor devices are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes providing a workpiece, and forming a protective material over a bottom surface and edges of the workpiece. A top surface of the workpiece is processed. The protective material protects the edges and the bottom surface of the workpiece during the processing of the top surface of the workpiece.
摘要翻译： 公开了制造半导体器件的方法。 在一个实施例中，制造半导体器件的方法包括提供工件，以及在工件的底表面和边缘上形成保护材料。 加工工件的顶面。 保护材料在加工工件的上表面时保护工件的边缘和底面。
-
-
-
-
-
-
-
-
-
搜索结果
22 条记录 (耗时 0.046 秒)
