LTPS array substrate and method for producing the same

    公开(公告)号:US10170506B2

    公开(公告)日:2019-01-01

    申请号:US15863991

    申请日:2018-01-08

    Inventor: Cong Wang Peng Du

    Abstract: An LTPS array substrate and a method for producing the same are proposed. The method includes: forming an insulating layer, a semiconductor layer, and a first positive photoresist layer on the substrate one by one; exposing one side of the substrate on the opposite side of the gate for forming a polycrystalline silicon layer; forming a source and a drain of the TFT on the polycrystalline silicon layer; forming a pixel electrode on the insulating layer and part of the source; forming a plain passivation layer on a source-drain electrode layer; forming a transparent electrode layer on the plain passivation layer so that the transparent electrode layer is connected to the gate, the source, and the drain via the contact hole. The use of masks in types and numbers in the LTPS technology can be reduced. Thus, both of the processes and the production costs are reduced.

    Liquid crystal display panel and fan-out area thereof
    5.
    发明授权
    Liquid crystal display panel and fan-out area thereof 有权
    液晶显示面板及其扇出区域

    公开(公告)号:US09563092B2

    公开(公告)日:2017-02-07

    申请号:US14384157

    申请日:2014-09-03

    Inventor: Cong Wang Peng Du

    CPC classification number: G02F1/1345

    Abstract: A liquid crystal display panel and a fan-out area thereof are provided. The fan-out area is arranged in a peripheral circuit area of the liquid crystal display panel and includes a middle wire and multiple fan-out wires arranged at two sides thereof. The middle wire and the fan-out wires each are disposed with at least one first wire pattern. Along each of directions toward the middle wire, widths of the first wire patterns of different wires are successively increased and/or lengths of the first wire patterns are successively decreased. The first wire patterns of a same wire have same width and length. Accordingly, the present invention can reduce the resistance differences among the wires in the fan-out area, color washout and non-uniform brightness caused by the resistance differences can be relieved or avoided, and is beneficial to the narrow border design of the liquid crystal display panel.

    Abstract translation: 提供了一种液晶显示面板及其扇出区域。 扇出区域布置在液晶显示面板的外围电路区域中,并且包括布置在其两侧的中间线和多个扇出线。 中间线和扇出线各自配置有至少一个第一线图案。 沿着朝向中间线的每个方向,不同线的第一线图形的宽度依次增加和/或第一线图案的长度连续减小。 同一根丝线的第一根丝线具有相同的宽度和长度。 因此,本发明可以减小扇出区域中的电线之间的电阻差异,可以缓解或避免由电阻差引起的彩色冲洗和不均匀的亮度,有利于液晶的窄边框设计 显示面板。

    Liquid crystal display device and display panel

    公开(公告)号:US09857646B2

    公开(公告)日:2018-01-02

    申请号:US14893489

    申请日:2015-09-29

    Inventor: Cong Wang Peng Du

    CPC classification number: G02F1/13452

    Abstract: The invention discloses a liquid crystal display device and its display panel. The display panel includes: a display region; a fan-out region, which is connected to at least one side of the display region; the fan-out region includes at least one group of fan-out wires, each group of the fan-out wires includes a plurality of wires, the wires include a first layer of metal wires and a second layer of metal wires that are disposed alternately, a part of the first layer of metal wires and the second layer of metal wires that are adjacent is overlapped. By the method above, the invention can reduce RC delay between the wires of each group of fan-out wires and improve display quality.

    Thin Film Transistor Array Substrate and Method for Manufacturing the Same
    9.
    发明申请
    Thin Film Transistor Array Substrate and Method for Manufacturing the Same 有权
    薄膜晶体管阵列基板及其制造方法

    公开(公告)号:US20150372010A1

    公开(公告)日:2015-12-24

    申请号:US14370774

    申请日:2014-06-18

    Abstract: The present invention proposes a TFT array substrate includes: a substrate; scan lines on the substrate; data lines intercrossing with the scan lines; a first insulating layer between the scan lines and the data lines; a second insulating layer on the first insulating layer and covering the data lines; a common electrode layer on the second insulating layer, comprising first holes located above the data lines. The first holes uncover the second insulating layer. The present invention decreases parasitic capacitance between the common electrode layer and data lines and between the common electrode layer and scan lines by decreasing overlaping sections between a common electrode layer and the data lines and between the common electrode layer and the scan lines. Therefore load of the data lines and the scan lines decreases, charge efficiency of the pixels increases, and display effect of an LCD panel is therefore improved.

    Abstract translation: 本发明提出一种TFT阵列基板,包括:基板; 在基板上扫描线; 数据线与扫描线交叉; 扫描线和数据线之间的第一绝缘层; 在所述第一绝缘层上的第二绝缘层并覆盖所述数据线; 在第二绝缘层上的公共电极层,包括位于数据线之上的第一孔。 第一孔露出第二绝缘层。 本发明通过减小公共电极层与数据线之间以及公共电极层与扫描线之间的重叠部分,减小公共电极层与数据线之间以及公共电极层与扫描线之间的寄生电容。 因此,数据线和扫描线的负载减小,像素的充电效率增加,因此改善了LCD面板的显示效果。

    LTPS array substrate and method for producing the same

    公开(公告)号:US10529750B2

    公开(公告)日:2020-01-07

    申请号:US15863993

    申请日:2018-01-08

    Inventor: Cong Wang Peng Du

    Abstract: An LTPS array substrate includes: a substrate on which a gate is disposed. An insulating layer and a polycrystalline silicon layer are disposed in sequence on the substrate and the gate. The insulating layer has an upper surface that is a plane. A source and a drain are disposed on the polycrystalline silicon layer and a pixel electrode is disposed on the insulating layer and a part of the drain. A plain passivation layer is disposed on the source and drain and includes a contact via formed therein at a location outside the polycrystalline silicon layer to expose a surface of one of the gate, the source, and the drain. A transparent electrode layer is disposed on the plain passivation layer to be electrically connected to the surface of the one of the gate, the source, and the drain that is exposed through the contact via.

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