公开(公告)号：US20050168410A1

公开(公告)日：2005-08-04

申请号：US11096102

申请日：2005-04-01

申请人： Shigetoshi Tomio ,  Tomokatsu Kishi ,  Katsumi Itoh ,  Tetsuya Sakamoto ,  Fumitaka Asami

发明人： Shigetoshi Tomio ,  Tomokatsu Kishi ,  Katsumi Itoh ,  Tetsuya Sakamoto ,  Fumitaka Asami

IPC分类号： G09G3/20 ,  G09G3/288 ,  G09G3/291 ,  G09G3/294 ,  G09G3/296 ,  G09G3/298 ,  G09G3/28

CPC分类号： G09G3/294 ,  G09G3/28 ,  G09G3/2927 ,  G09G3/2965 ,  G09G2310/066

摘要： A first signal line (OUTA) supplies a first electric potential to a terminal of an X-side of a load (20) through a switch (SW4). A second signal line (OUTB) supplies a second electric potential to the terminal of the X-side of the load (20) through a switch (SW5). Coil circuits (A and B) are connected between the first signal line (OUTA) and the second signal line (OUTB) and a ground. Furthermore, each of the coil circuits (A and B) is a circuit configured with, for example, a coil and a diode, and the coil is connected so as to carry out L-C resonance with the load (20) through the switches (SW4 and SW5).

摘要翻译： 第一信号线（OUTA）通过开关（SW 4）向负载（20）的X侧的端子提供第一电位。 第二信号线（OUTB）通过开关（SW 5）向负载（20）的X侧的端子提供第二电位。 线圈电路（A和B）连接在第一信号线（OUTA）和第二信号线（OUTB）和接地之间。 此外，线圈电路（A和B）中的每一个是例如由线圈和二极管构成的电路，并且线圈被连接以便通过开关（SW）与负载（20）执行LC谐振 4和SW 5）。

公开(公告)号：US20050184977A1

公开(公告)日：2005-08-25

申请号：US10989463

申请日：2004-11-17

申请人： Katsumi Itoh ,  Tomokatsu Kishi ,  Shigetoshi Tomio ,  Tetsuya Sakamoto ,  Isao Furukawa

发明人： Katsumi Itoh ,  Tomokatsu Kishi ,  Shigetoshi Tomio ,  Tetsuya Sakamoto ,  Isao Furukawa

IPC分类号： H04N5/66 ,  G09G3/20 ,  G09G3/288 ,  G09G3/291 ,  G09G3/294 ,  G09G3/296 ,  G09G3/298 ,  G09G3/299 ,  G09G5/00

CPC分类号： G09G3/296 ,  G09G3/294 ,  G09G3/299 ,  G09G2330/021

摘要： A capacitive load drive circuit that has reduced power consumption due to residual carriers, and a PDP apparatus using the same, have been disclosed. In the drive circuit, the power consumption due to the residual carriers, which are formed when a diode provided in parallel to a switch circuit of the capacitive load drive circuit is brought into conduction, is reduced and the switch circuit connected in parallel to the diode is brought into conduction during a period of time from when the diode is brought into conduction until when the potential of a terminal to which the diode is connected changes. By bringing the switch circuit connected in parallel into conduction, a closed circuit is formed by the diode and the switch circuit and the residual carriers formed in the diode are reduced. The voltage of the closed circuit is substantially zero V and, therefore, power consumption is very small even if a current due to the residual carriers flows through the closed circuit.

摘要翻译： 已经公开了由于残留载波而降低了功耗的电容性负载驱动电路和使用其的PDP装置。 在驱动电路中，与并联于容性负载驱动电路的开关电路的二极管导通时形成的残留载流子所引起的功率消耗减少，开关电路与二极管并联连接 在从二极管导通直至连接二极管的端子的电位变化的时间段内被导通。 通过并联连接的开关电路导通，由二极管和开关电路形成闭合电路，并且形成在二极管中的残留载流子减少。 闭合电路的电压基本上为零V，因此即使由于残留载流子流过的电流流经闭路，功耗也非常小。

公开(公告)号：US06965359B2

公开(公告)日：2005-11-15

申请号：US09966510

申请日：2001-09-28

申请人： Tomoyuki Ishii ,  Tadatsugu Hirose ,  Yoshikazu Kanazawa ,  Toshio Ueda ,  Tomokatsu Kishi ,  Shigetoshi Tomio ,  Fumitaka Asami

发明人： Tomoyuki Ishii ,  Tadatsugu Hirose ,  Yoshikazu Kanazawa ,  Toshio Ueda ,  Tomokatsu Kishi ,  Shigetoshi Tomio ,  Fumitaka Asami

IPC分类号： G09G3/20 ,  G09G3/292 ,  G09G3/293 ,  G09G3/294 ,  G09G3/296 ,  G09G3/298 ,  G09G3/299 ,  H01J17/49 ,  G09G3/28

CPC分类号： H01J11/28 ,  G09G3/2018 ,  G09G3/292 ,  G09G3/293 ,  G09G3/2932 ,  G09G3/294 ,  G09G3/2948 ,  G09G3/296 ,  G09G3/2983 ,  G09G3/299 ,  G09G2310/0205 ,  G09G2310/0218 ,  G09G2310/0221 ,  G09G2310/0224 ,  G09G2330/021 ,  H01J11/12 ,  H01J11/44 ,  H01J2211/444

摘要： Method for driving a plasma display panel. At least one first discharge sustaining pulse is applied to a first pair of display electrodes, and at least one second discharge sustaining pulse applied to an adjacent pair of display electrodes. The first and second discharge sustaining pulses are applied such that they are in the same phase as one another and/or such that a current in the first pair of display electrodes flows in the opposite direction from a current in the adjacent pair of display electrodes.

摘要翻译： 驱动等离子体显示面板的方法 至少一个第一放电维持脉冲被施加到第一对显示电极，并且至少一个第二放电维持脉冲施加到相邻的一对显示电极。 施加第一和第二放电维持脉冲，使得它们彼此处于相同的相位和/或使得第一对显示电极中的电流与相邻的一对显示电极中的电流相反的方向流动。

公开(公告)号：US06373452B1

公开(公告)日：2002-04-16

申请号：US08690038

申请日：1996-07-31

申请人： Tomoyuki Ishii ,  Tadatsugu Hirose ,  Yoshikazu Kanazawa ,  Toshio Ueda ,  Tomokatsu Kishi ,  Shigetoshi Tomio ,  Fumitaka Asami

发明人： Tomoyuki Ishii ,  Tadatsugu Hirose ,  Yoshikazu Kanazawa ,  Toshio Ueda ,  Tomokatsu Kishi ,  Shigetoshi Tomio ,  Fumitaka Asami

IPC分类号： G09G328

CPC分类号： H01J11/28 ,  G09G3/2018 ,  G09G3/292 ,  G09G3/293 ,  G09G3/2932 ,  G09G3/294 ,  G09G3/2948 ,  G09G3/296 ,  G09G3/2983 ,  G09G3/299 ,  G09G2310/0205 ,  G09G2310/0218 ,  G09G2310/0221 ,  G09G2310/0224 ,  G09G2330/021 ,  H01J11/12 ,  H01J11/44 ,  H01J2211/444

摘要： An electrode drive circuit performs interlaced scanning, ensuring that the phases of the sustaining pulse in odd-numbered lines and even-numbered lines among L1 to L8 between surface discharge electrodes are the reverse of each other. With this, when either odd-numbered lines or even-numbered lines are displayed, the voltages applied between the electrodes of the undisplayed lines are at 0, eliminating the necessity for partitioning walls on the surface discharge electrodes. In surface discharge electrodes, X electrodes are provided on the two sides of a Y electrode and the area between the Y electrode and the X electrode on one side is assigned a display line at an odd-numbered frame, and the area between the Y electrode and the X electrode on the other side is assigned a display line in an even-numbered frame. Alternate areas between the surface discharge electrodes are assigned as blind lines and a discharge light emission in the blind lines is blocked or incident light to the blind lines from the outside is absorbed. Address electrodes are provided for each monochromatic pixel column and selectively connected with the pads above them, performing simultaneous selection of lines.

摘要翻译： 电极驱动电路进行隔行扫描，确保表面放电电极之间的L1〜L8中的奇数行和偶数行中的维持脉冲的相位彼此相反。 这样，当显示奇数行或偶数行时，施加在未显示行的电极之间的电压为0，消除了在表面放电电极上分隔壁的必要性。 在表面放电电极中，X电极设置在Y电极的两侧，并且一侧的Y电极和X电极之间的区域被指定为奇数帧的显示线，并且Y电极 并且在另一侧的X电极被分配有偶数帧中的显示行。 表面放电电极之间的交替区域被分配为盲线，并且盲线中的放电发光被阻挡，或者从外部吸收到盲线的入射光。 为每个单色像素列提供地址电极，并选择性地与其上的焊盘连接，执行行的同时选择。

公开(公告)号：US06531995B2

公开(公告)日：2003-03-11

申请号：US09135101

申请日：1998-08-17

申请人： Tomoyuki Ishii ,  Tadatsugu Hirose ,  Yoshikazu Kanazawa ,  Toshio Ueda ,  Tomokatsu Kishi ,  Shigetoshi Tomio ,  Fumitaka Asami

发明人： Tomoyuki Ishii ,  Tadatsugu Hirose ,  Yoshikazu Kanazawa ,  Toshio Ueda ,  Tomokatsu Kishi ,  Shigetoshi Tomio ,  Fumitaka Asami

IPC分类号： G09G328

CPC分类号： H01J11/28 ,  G09G3/2018 ,  G09G3/292 ,  G09G3/293 ,  G09G3/2932 ,  G09G3/294 ,  G09G3/2948 ,  G09G3/296 ,  G09G3/2983 ,  G09G3/299 ,  G09G2310/0205 ,  G09G2310/0218 ,  G09G2310/0221 ,  G09G2310/0224 ,  G09G2330/021 ,  H01J11/12 ,  H01J11/44 ,  H01J2211/444

摘要： An electrode drive circuit performs interlaced scanning, ensuring that the phases of the sustaining pulse in odd-numbered lines and even-numbered lines among L1 to L8 between surface discharge electrodes are the reverse of each other. With this, when either odd-numbered lines or even-numbered lines are displayed, the voltages applied between the electrodes of the undisplayed lines are at 0, eliminating the necessity for partitioning walls on the surface discharge electrodes. In surface discharge electrodes, X electrodes are provided on the two sides of a Y electrode and the area between the Y electrode and the X electrode on one side is assigned a display line at an odd-numbered frame, and the area between the Y electrode and the X electrode on the other side is assigned a display line in an even-numbered frame. Alternate areas between the surface discharge electrodes are assigned as blind lines and a discharge light emission in the blind lines is blocked or incident light to the blind lines from the outside is absorbed. Address electrodes are provided for each monochromatic pixel column and selectively connected with the pads above them, performing simultaneous selection of lines.

公开(公告)号：US07705806B2

公开(公告)日：2010-04-27

申请号：US11263472

申请日：2005-10-31

申请人： Tomoyuki Ishii ,  Tadatsugu Hirose ,  Yoshikazu Kanazawa ,  Toshio Ueda ,  Tomokatsu Kishi ,  Shigetoshi Tomio ,  Fumitaka Asami

发明人： Tomoyuki Ishii ,  Tadatsugu Hirose ,  Yoshikazu Kanazawa ,  Toshio Ueda ,  Tomokatsu Kishi ,  Shigetoshi Tomio ,  Fumitaka Asami

IPC分类号： G09G3/28

CPC分类号： H01J11/28 ,  G09G3/2018 ,  G09G3/292 ,  G09G3/293 ,  G09G3/2932 ,  G09G3/294 ,  G09G3/2948 ,  G09G3/296 ,  G09G3/2983 ,  G09G3/299 ,  G09G2310/0205 ,  G09G2310/0218 ,  G09G2310/0221 ,  G09G2310/0224 ,  G09G2330/021 ,  H01J11/12 ,  H01J11/44 ,  H01J2211/444

摘要： A method for driving a plasma display panel, including a plurality of display electrode pairs and a plurality of address electrodes, and which includes at least an address period and a sustain discharge period. In the address period, performing address processing, between the address electrodes and a display electrode configured as either a set of odd or even numbered display electrodes, sequentially to all of one of the sets of display electrode pairs, and thereafter address processing, between the address electrodes and a display electrode configured as the other set of display electrode pairs, sequentially to all of the other set of display electrode pairs. In the sustain discharge period, supplying at least one first sustain discharge pulse to the one set of display electrode pairs, and supplying at least one second sustain discharge pulse to the other set of display electrode pairs.

摘要翻译： 一种用于驱动等离子体显示面板的方法，包括多个显示电极对和多个寻址电极，并且至少包括寻址周期和维持放电周期。 在地址周期中，在寻址电极和配置为奇数或偶数编号的显示电极的显示电极之间执行地址处理，依次连接到所述一组显示电极对中的所有一个，然后进行地址处理， 寻址电极和被配置为另一组显示电极对的显示电极，依次连接到所有另一组显示电极对。 在维持放电期间，向一组显示电极对提供至少一个第一维持放电脉冲，并向另一组显示电极对提供至少一个第二维持放电脉冲。

公开(公告)号：US20060050094A1

公开(公告)日：2006-03-09

申请号：US11263472

申请日：2005-10-31

申请人： Tomoyuki Ishii ,  Tadatsugu Hirose ,  Yoshikazu Kanazawa ,  Toshio Ueda ,  Tomokatsu Kishi ,  Shigetoshi Tomio ,  Fumitaka Asami

发明人： Tomoyuki Ishii ,  Tadatsugu Hirose ,  Yoshikazu Kanazawa ,  Toshio Ueda ,  Tomokatsu Kishi ,  Shigetoshi Tomio ,  Fumitaka Asami

IPC分类号： G09G5/10

CPC分类号： H01J11/28 ,  G09G3/2018 ,  G09G3/292 ,  G09G3/293 ,  G09G3/2932 ,  G09G3/294 ,  G09G3/2948 ,  G09G3/296 ,  G09G3/2983 ,  G09G3/299 ,  G09G2310/0205 ,  G09G2310/0218 ,  G09G2310/0221 ,  G09G2310/0224 ,  G09G2330/021 ,  H01J11/12 ,  H01J11/44 ,  H01J2211/444

摘要： An electrode drive circuit performs interlaced scanning, ensuring that the phases of the sustaining pulse in odd-numbered lines and even-numbered lines among L1 to L8 between surface discharge electrodes are the reverse of each other. With this, when either odd-numbered lines or even-numbered lines are displayed, the voltages applied between the electrodes of the undisplayed lines are at 0, eliminating the necessity for partitioning walls on the surface discharge electrodes. In surface discharge electrodes, X electrodes are provided on the two sides of a Y electrode and the area between the Y electrode and the X electrode on one side is assigned a display line at an odd-numbered frame, and the area between the Y electrode and the X electrode on the other side is assigned a display line in an even-numbered frame. Alternate areas between the surface discharge electrodes are assigned as blind lines and a discharge light emission in the blind lines is blocked or incident light to the blind lines from the outside is absorbed. Address electrodes are provided for each monochromatic pixel column and selectively connected with the pads above them, performing simultaneous selection of lines.

摘要翻译： 电极驱动电路进行隔行扫描，确保表面放电电极之间的L 1〜L 8中的奇数行和偶数行中的维持脉冲的相位彼此相反。 这样，当显示奇数行或偶数行时，施加在未显示行的电极之间的电压为0，消除了在表面放电电极上分隔壁的必要性。 在表面放电电极中，X电极设置在Y电极的两侧，并且一侧的Y电极和X电极之间的区域被分配有奇数帧的显示线，并且Y电极 并且在另一侧的X电极被分配有偶数帧中的显示行。 表面放电电极之间的交替区域被分配为盲线，并且盲线中的放电发光被阻挡，或者从外部吸收到盲线的入射光。 为每个单色像素列提供地址电极，并选择性地与其上的焊盘连接，执行行的同时选择。

公开(公告)号：US20060208966A1

公开(公告)日：2006-09-21

申请号：US11358035

申请日：2006-02-22

申请人： Tetsuya Sakamoto ,  Makoto Onozawa ,  Tomokatsu Kishi ,  Shigetoshi Tomio

发明人： Tetsuya Sakamoto ,  Makoto Onozawa ,  Tomokatsu Kishi ,  Shigetoshi Tomio

IPC分类号： G09G3/28

CPC分类号： G09G3/2965

摘要： There is provided a drive circuit including: a first signal line connectable to a capacitive load; a second signal line connectable to the capacitive load; a first switch connected between the first signal line and a first potential; a second switch connected between the first signal line and a second potential; a capacitor connected between the first and second signal lines; a third switch connected between the second signal line and the second potential; and a coil circuit connected between at least one of the first and second signal lines and the second potential. At least one of the second switch and the third switch has a configuration in which plural n-channel field-effect transistors are connected in series.

摘要翻译： 提供了一种驱动电路，包括：可连接到电容性负载的第一信号线; 可连接到电容性负载的第二信号线; 连接在第一信号线和第一电位之间的第一开关; 连接在第一信号线和第二电位之间的第二开关; 连接在第一和第二信号线之间的电容器; 连接在第二信号线和第二电位之间的第三开关; 以及连接在第一和第二信号线中的至少一个与第二电位之间的线圈电路。 第二开关和第三开关中的至少一个具有多个n沟道场效应晶体管串联连接的结构。

公开(公告)号：US06803889B2

公开(公告)日：2004-10-12

申请号：US09984738

申请日：2001-10-31

申请人： Makoto Onozawa ,  Tomokatsu Kishi ,  Shigetoshi Tomio ,  Tetsuya Sakamoto

发明人： Makoto Onozawa ,  Tomokatsu Kishi ,  Shigetoshi Tomio ,  Tetsuya Sakamoto

IPC分类号： G09G328

CPC分类号： G09G3/296 ,  G09G3/2965 ,  G09G2310/066 ,  G09G2320/046

摘要： A signal transfer circuit in a pre-drive circuit converts the reference potential of a control signal, supplied from a drive control circuit, to the reference potential of an output element. The control signal is then amplified in a signal amplifier circuit and thereafter supplied to the output element. This makes it possible to isolate the reference potential and transfer the control signal to the output element even when the reference potentials of the drive control circuit and the control signal are different from that of the output element. The drive control circuit can also be prevented from being affected by variations in potential of the output element or the like.

摘要翻译： 预驱动电路中的信号传输电路将从驱动控制电路提供的控制信号的参考电位转换为输出元件的参考电位。 然后，控制信号在信号放大器电路中被放大，然后被提供给输出元件。 即使当驱动控制电路和控制信号的参考电位与输出元件的参考电位不同时，也可以隔离参考电位并将控制信号传送到输出元件。 还可以防止驱动控制电路受输出元件等的电位变化的影响。

公开(公告)号：US06686912B1

公开(公告)日：2004-02-03

申请号：US09606434

申请日：2000-06-28

申请人： Tomokatsu Kishi ,  Tetsuya Sakamoto ,  Shigetoshi Tomio

发明人： Tomokatsu Kishi ,  Tetsuya Sakamoto ,  Shigetoshi Tomio

IPC分类号： G09G500

CPC分类号： G09G3/2965 ,  G09G3/2927 ,  G09G3/294 ,  G09G3/296 ,  G09G3/299 ,  G09G2310/066

摘要： A driving apparatus comprises switches SW1 to Sw3, a first signal line OUTA, and a second signal line OUTB. By ON/OFF control of the switches SW1 to Sw3, the voltage of the first signal line OUTA is changed between a positive voltage (+1/2V) level, which is smaller than a voltage V to be applied to a load 20, and the ground level, and the voltage of the second signal line OUTB is changed between the ground level and a negative voltage (−1/2V). By ON/OFF control of switches SW4 and SW5, the positive and negative voltages given by the first and second signal lines are selectively applied to the load 20. The maximum voltage applied to each element in the driving apparatus can be thereby lowered to the voltage (1/2V), which is smaller than the voltage V to be applied to the load 20. This makes it possible to hold down the breakdown voltage of each element to half the conventional value.

摘要翻译： 驱动装置包括开关SW1至Sw3，第一信号线OUTA和第二信号线OUTB。 通过开关SW1〜Sw3的ON / OFF控制，第一信号线OUTA的电压在小于施加到负载20的电压V的正电压（+ 1 / 2V）电平之间变化，以及 接地电平和第二信号线OUTB的电压在接地电平和负电压（-1 / 2V）之间变化。 通过开关SW4和SW5的ON / OFF控制，由第一和第二信号线给出的正电压和负电压被选择性地施加到负载20.施加到驱动装置中的每个元件的最大电压可以由此降低到电压 （1 / 2V），其小于施加到负载20的电压V.这使得可以将每个元件的击穿电压压制成常规值的一半。