摘要:
A resister network having a negative temperature coefficient (NTC) may be utilized to create a temperature compensated equivalent resistance “R” for a current sensing RC network used in measuring inductor current of a DC-to-DC converter or a general switching regulator that needs to use inductor current as a control signal. The NTC resistor of the RC network effectively compensates for the positive temperature coefficient of the switching regulator inductor's inherent DC resistance (DCR). Keeping the time constants of the RC network and the switching regulator inductor substantially matched improves operation of cycle by cycle based control modes such as peak current sensing by the switching regulator controller in performing peak current control for the DC-to-DC converter.
摘要:
A resister network having a negative temperature coefficient (NTC) may be utilized to create a temperature compensated equivalent resistance “R” for a current sensing RC network used in measuring inductor current of a DC-to-DC converter or a general switching regulator that needs to use inductor current as a control signal. The NTC resistor of the RC network effectively compensates for the positive temperature coefficient of the switching regulator inductor's inherent DC resistance (DCR). Keeping the time constants of the RC network and the switching regulator inductor substantially matched improves operation of cycle by cycle based control modes such as peak current sensing by the switching regulator controller in performing peak current control for the DC-to-DC converter.
摘要:
A method and circuit to output adaptive drive voltages within information handling systems is disclosed. According to one aspect of the disclosure, a method of outputting power within an information handling system can include sensing a load current of a power output stage operable to employ more than one drive voltage level. The method can also include comparing the load current to a threshold current setting, and selecting a first output drive voltage from a plurality of input drive voltages in response to comparing the load current to the threshold current setting. The method can also include coupling the first output drive voltage to the power output stage.
摘要:
A synchronous Buck voltage regulator accepts an input voltage to provide a regulated output voltage to an information handling system processing component, such as a CPU. Input voltage is regulated by a control MOSFET, a synchronous MOSFET and a regulator controller that controls the output by controlling the control and synchronous MOSFETs. The synchronous MOSFET handles overvoltage events output from the control MOSFET by interfacing an inductor-capacitor tank circuit to reduce the overvoltage. A negative voltage protection MOSFET driver associated with the regulator controller monitors for negative voltage events that result from the interfacing of the inductor-capacitor tank circuit and selectively decouples the inductor-capacitor tank circuit if the negative voltage event is associated with a predetermined condition. The negative voltage protection MOSFET driver maintains the interface of the inductor-capacitor tank circuit if the overvoltage event is associated with a failed control MOSFET.
摘要:
A method and circuit to output adaptive drive voltages within information handling systems is disclosed. According to one aspect of the disclosure, a method of outputting power within an information handling system can include sensing a load current of a power output stage operable to employ more than one drive voltage level. The method can also include comparing the load current to a threshold current setting, and selecting a first output drive voltage from a plurality of input drive voltages in response to comparing the load current to the threshold current setting. The method can also include coupling the first output drive voltage to the power output stage.
摘要:
A synchronous Buck voltage regulator accepts an input voltage to provide a regulated output voltage to an information handling system processing component, such as a CPU. Input voltage is regulated by a control MOSFET, a synchronous MOSFET and a regulator controller that controls the output by controlling the control and synchronous MOSFETs. The synchronous MOSFET handles overvoltage events output from the control MOSFET by interfacing an inductor-capacitor tank circuit to reduce the overvoltage. A negative voltage protection MOSFET driver associated with the regulator controller monitors for negative voltage events that result from the interfacing of the inductor-capacitor tank circuit and selectively decouples the inductor-capacitor tank circuit if the negative voltage event is associated with a predetermined condition. The negative voltage protection MOSFET driver maintains the interface of the inductor-capacitor tank circuit if the overvoltage event is associated with a failed control MOSFET.
摘要:
Methods and systems are disclosed that may be employed to enable multi-phase voltage regulator (VR) system calibration during the development phase of a multi-phase VR system so as to meet defined accuracy targets and, in one example, to avoid the need for system level calibration in a production environment. The disclosed systems and methods may be further implemented to enable use of multiple sources for and types of integrated power stages (IPstages) in a common multi-phase VR system configuration while still achieving the required current sense accuracy, thus reducing or substantially eliminating continuity of supply (COS) concerns.
摘要:
Methods and systems are disclosed that may be employed to improve efficiency of smart integrated power stages (IPstages) of multi-phase VR systems while operating under relatively light, ultra-light, or partial or reduced loads. The disclosed methods and systems may be implemented to improve VR system light load efficiency by providing and enabling reduced power IPstage operating modes in one or more smart IPstage/s of a VR system, and by enabling state transition between IPstage active and reduced power operating modes such as IPstage standby and IPstage hibernation modes.
摘要:
Systems and methods are disclosed that provide static phase shedding techniques to improve the efficiency of multi-phase voltage regulators within information handling systems by selecting the number of active phases for the multi-phase voltage regulators using circuit identifiers (IDs) for circuitry configured to be powered by the multi-phase voltage regulators, such as central processing units (CPUs). In one embodiment, processor identifier information related to installed CPUs is used to control the voltage regulator (VR) phase number to provide static phase shedding. This VR control can be implemented in a variety of ways, including the use of conventional analog multi-phase VR controllers and/or digital VR controllers. Dynamic phase shedding can also be used in conjunction with this static phase shedding to further reduce the number of active phases when a processor operates in a low power mode.
摘要:
An information handling system (IHS) is disclosed providing a power supply operable to provide an output current to the IHS during power initiation. The IHS may also include a first power component associated with a first power stage wherein the first power stage may have a first current threshold. Furthermore, the IHS may include a power control logic coupled to the power supply and the first power component. As such, the power control logic may be operable to communicate the first power stage to the power supply, and if the output current does not exceed the first current threshold during the first power stage, the power control logic may be operable to communicate a second power stage having a second current threshold to the power supply.