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    Circuit board structure employing ferrite element
    1.
    发明授权
    Circuit board structure employing ferrite element 失效
    采用铁素体元件的电路板结构

    公开(公告)号：US08093504B2

    公开(公告)日：2012-01-10

    申请号：US12414659

    申请日：2009-03-30

    申请人： Shih-Chieh Chao ,  Chih-Wen Huang ,  Chun-Lin Liao

    发明人： Shih-Chieh Chao ,  Chih-Wen Huang ,  Chun-Lin Liao

    IPC分类号： H05K1/09

    CPC分类号： H05K1/0233 ,  H05K1/0225 ,  H05K2201/086 ,  H05K2201/09309 ,  H05K2201/09663

    摘要： A circuit board structure includes a dielectric layer, a first metal layer, a second metal layer and a first ferrite element. The first metal layer is disposed on an upper surface of the dielectric layer and has a first circuit area, a second circuit area and a first metallic neck connecting the first circuit and the second circuit areas. The second metal layer is disposed on a lower surface of the dielectric layer and has a third circuit area, a fourth circuit area and at least a second metallic neck connecting the third circuit and the fourth circuit areas. The orthogonal projections of the first and the second metallic necks on the upper surface are not overlapped. The first ferrite element is disposed on the upper surface and overlays at least one of the orthogonal projections of the first and the second metallic necks on the upper surface.

    摘要翻译： 电路板结构包括电介质层，第一金属层，第二金属层和第一铁氧体元件。 第一金属层设置在电介质层的上表面上，并且具有第一电路区域，第二电路区域和连接第一电路和第二电路区域的第一金属颈部。 第二金属层设置在电介质层的下表面上，并且具有第三电路区域，第四电路区域和连接第三电路和第四电路区域的至少第二金属颈。 第一和第二金属颈部在上表面上的正交突起不重叠。 第一铁氧体元件设置在上表面上并且覆盖在上表面上的第一和第二金属颈部的至少一个正交突起。

    CIRCUIT BOARD STRUCTURE
    2.
    发明申请
    CIRCUIT BOARD STRUCTURE 失效
    电路板结构

    公开(公告)号：US20100200281A1

    公开(公告)日：2010-08-12

    申请号：US12414659

    申请日：2009-03-30

    申请人： Shih-Chieh Chao ,  Chih-Wen Huang ,  Chun-Lin Liao

    发明人： Shih-Chieh Chao ,  Chih-Wen Huang ,  Chun-Lin Liao

    IPC分类号： H05K1/09

    CPC分类号： H05K1/0233 ,  H05K1/0225 ,  H05K2201/086 ,  H05K2201/09309 ,  H05K2201/09663

    摘要： A circuit board structure includes a dielectric layer, a first metal layer, a second metal layer and a first ferrite element. The first metal layer is disposed on an upper surface of the dielectric layer and has a first circuit area, a second circuit area and a first metallic neck connecting the first circuit and the second circuit areas. The second metal layer is disposed on a lower surface of the dielectric layer and has a third circuit area, a fourth circuit area and at least a second metallic neck connecting the third circuit and the fourth circuit areas. The orthogonal projections of the first and the second metallic necks on the upper surface are not overlapped. The first ferrite element is disposed on the upper surface and overlays at least one of the orthogonal projections of the first and the second metallic necks on the upper surface.

    摘要翻译： 电路板结构包括电介质层，第一金属层，第二金属层和第一铁氧体元件。 第一金属层设置在电介质层的上表面上，并且具有第一电路区域，第二电路区域和连接第一电路和第二电路区域的第一金属颈部。 第二金属层设置在电介质层的下表面上，并且具有第三电路区域，第四电路区域和连接第三电路和第四电路区域的至少第二金属颈。 第一和第二金属颈部在上表面上的正交突起不重叠。 第一铁氧体元件设置在上表面上并且覆盖在上表面上的第一和第二金属颈部的至少一个正交突起。

    Multi-layer printed circuit with low noise
    4.
    发明申请
    Multi-layer printed circuit with low noise 失效
    多层印刷电路噪音低

    公开(公告)号：US20060090929A1

    公开(公告)日：2006-05-04

    申请号：US11055615

    申请日：2005-02-11

    申请人： Shih-Chieh Chao ,  Chih-Wen Huang ,  Chun-Lin Liao

    发明人： Shih-Chieh Chao ,  Chih-Wen Huang ,  Chun-Lin Liao

    IPC分类号： H05K7/06

    CPC分类号： H05K1/0218 ,  H05K1/0219 ,  H05K1/0231 ,  H05K2201/09236 ,  H05K2201/09972

    摘要： A multi-layer printed circuit board having a low noise characteristic, the multi-layer printed circuit board includes at least one circuit layer; at least one isolation line for dividing the at least one circuit layer into at least two areas, the at least one isolation line forming an open pattern and the at least one isolation line extendedly forming a long neck line into the at least one area; and at least one capacitor placed at one side of the opening of the open pattern in any one of the areas.

    摘要翻译： 一种具有低噪声特性的多层印刷电路板，所述多层印刷电路板包括至少一个电路层; 用于将所述至少一个电路层分成至少两个区域的至少一个隔离线，所述至少一个隔离线形成开放图案，所述至少一个隔离线将长的颈线延伸到所述至少一个区域中; 以及放置在任何一个区域中的开放图案的开口的一侧的至少一个电容器。

    MEASUREMENT CORRECTING SYSTEM AND METHOD THEREOF
    6.
    发明申请
    MEASUREMENT CORRECTING SYSTEM AND METHOD THEREOF 审中-公开
    测量校正系统及其方法

    公开(公告)号：US20110208461A1

    公开(公告)日：2011-08-25

    申请号：US12765857

    申请日：2010-04-22

    申请人： Shih-Chieh Chao ,  Chih-Wen Huang ,  Chun-Lin Liao

    发明人： Shih-Chieh Chao ,  Chih-Wen Huang ,  Chun-Lin Liao

    IPC分类号： G01D18/00

    CPC分类号： G01D3/0365

    摘要： A measurement correcting system including a field measuring unit and a processing unit is provided. The field measuring unit simultaneously senses a first signal to be measured and a second signal to be measured which have opposite polarities and substantially the same magnitude, and generates a first output signal and a second output signal correspondingly. The processing unit determines the first signal to be measured according to the first output signal and the second output signal. A measurement correcting method is also provided.

    摘要翻译： 提供了包括场测量单元和处理单元的测量校正系统。 场测量单元同时感测具有相反极性和基本相同幅度的待测量的第一信号和待测量的第二信号，并相应地产生第一输出信号和第二输出信号。 处理单元根据第一输出信号和第二输出信号确定要测量的第一信号。 还提供了一种测量校正方法。

    STRUCTURE OF MULTI-LAYER PRINTED CIRCUIT BOARD
    7.
    发明申请
    STRUCTURE OF MULTI-LAYER PRINTED CIRCUIT BOARD 审中-公开
    多层印刷电路板的结构

    公开(公告)号：US20100126759A1

    公开(公告)日：2010-05-27

    申请号：US12409519

    申请日：2009-03-24

    申请人： Shih-Chieh Chao ,  Chih-Wen Huang ,  Chun-Lin Liao

    发明人： Shih-Chieh Chao ,  Chih-Wen Huang ,  Chun-Lin Liao

    IPC分类号： H05K1/16

    CPC分类号： H05K1/162 ,  H05K1/0231 ,  H05K1/0233 ,  H05K1/0373 ,  H05K2201/086 ,  H05K2201/09309

    摘要： A structure of a multi-layer printed circuit board includes a power layer, a ground layer, and a dielectric layer. The dielectric layer is located between the power layer and the ground layer. The dielectric layer has a relative permittivity and a relative permeability, wherein the product of the relative permittivity and the relative permeability substantially decreases along with an increase in frequency within a frequency range.

    摘要翻译： 多层印刷电路板的结构包括功率层，接地层和电介质层。 电介质层位于功率层和接地层之间。 电介质层具有相对介电常数和相对磁导率，其中相对介电常数和相对磁导率的乘积随频率范围内频率的增加而显着降低。

    Multi-layer printed circuit with low noise
    8.
    发明授权
    Multi-layer printed circuit with low noise 失效
    多层印刷电路噪音低

    公开(公告)号：US07183492B2

    公开(公告)日：2007-02-27

    申请号：US11055617

    申请日：2005-02-11

    申请人： Shih-Chieh Chao ,  Chih-Wen Huang ,  Chun-Lin Liao

    发明人： Shih-Chieh Chao ,  Chih-Wen Huang ,  Chun-Lin Liao

    IPC分类号： H05K1/03

    CPC分类号： H05K1/0218 ,  H05K1/0219 ,  H05K2201/09236 ,  H05K2201/09972

    摘要： A multi-layer printed circuit board having a low noise characteristic, the multi-layer printed circuit board includes: at least one circuit layer; at least one isolation line for dividing the at least one circuit layer into at least two areas, the at least one isolation line forms an open pattern and the at least one isolation line extendedly forms a long neck line into the at least one area, and an internal opening of the long neck line located at a geometric center of the at least one area to improve the isolation, especially for the noises near the resonant frequencies of the isolation areas.

    摘要翻译： 一种具有低噪声特性的多层印刷电路板，所述多层印刷电路板包括：至少一个电路层; 用于将所述至少一个电路层分成至少两个区域的至少一个隔离线，所述至少一个隔离线形成开放图案，并且所述至少一个隔离线在所述至少一个区域中延伸形成长颈线，以及 位于所述至少一个区域的几何中心处的长颈线的内部开口，以改善隔离，特别是对于隔离区域的谐振频率附近的噪声。

    Circuit board
    9.
    发明授权
    Circuit board 失效
    具有电磁噪声滤波器结构的电路板

    公开(公告)号：US08035993B2

    公开(公告)日：2011-10-11

    申请号：US12422292

    申请日：2009-04-13

    申请人： Shih-Chieh Chao ,  Chih-Wen Huang ,  Chun-Lin Liao

    发明人： Shih-Chieh Chao ,  Chih-Wen Huang ,  Chun-Lin Liao

    IPC分类号： H05K9/00

    CPC分类号： H05K1/0236 ,  H01F2017/0046 ,  H05K1/0231 ,  H05K1/165 ,  H05K2201/09309 ,  H05K2201/09627

    摘要： A circuit board including a first patterned metal layer and a second patterned metal layer is provided. The first patterned metal layer has metal blocks and spiral structures. A gap is kept between any two adjacent metal blocks. Each of the spiral structures is electrically connected between any two adjacent metal blocks. The second patterned metal layer is disposed beside the first patterned metal layer and has jumper segments. Each of the jumper segments has a first end and a second end opposite to the first end. Each of the spiral structures has an outer end and an inner end. The outer end is connected to one of the two adjacent metal blocks. The inner end is electrically connected to the first end of one of the jumper segments, and the second end of the jumper segment is electrically connected to the other one of the two the metal blocks.

    摘要翻译： 提供了包括第一图案化金属层和第二图案化金属层的电路板。 第一图案化金属层具有金属块和螺旋结构。 在任何两个相邻的金属块之间保持间隙。 每个螺旋结构电连接在任何两个相邻的金属块之间。 第二图案化金属层设置在第一图案化金属层旁边并且具有跨接段。 每个跳线段具有与第一端相对的第一端和第二端。 每个螺旋结构具有外端和内端。 外端连接到两个相邻的金属块中的一个。 内端电连接到一个跳线段的第一端，并且跳线段的第二端电连接到两个金属块中的另一个。

    CIRCUIT BOARD
    10.
    发明申请
    CIRCUIT BOARD 失效
    电路板

    公开(公告)号：US20100172111A1

    公开(公告)日：2010-07-08

    申请号：US12422292

    申请日：2009-04-13

    申请人： Shih-Chieh Chao ,  Chih-Wen Huang ,  Chun-Lin Liao

    发明人： Shih-Chieh Chao ,  Chih-Wen Huang ,  Chun-Lin Liao

    IPC分类号： H05K7/00 ,  H01F5/00

    CPC分类号： H05K1/0236 ,  H01F2017/0046 ,  H05K1/0231 ,  H05K1/165 ,  H05K2201/09309 ,  H05K2201/09627

    摘要： A circuit board including a first patterned metal layer and a second patterned metal layer is provided. The first patterned metal layer has metal blocks and spiral structures. A gap is kept between any two adjacent metal blocks. Each of the spiral structures is electrically connected between any two adjacent metal blocks. The second patterned metal layer is disposed beside the first patterned metal layer and has jumper segments. Each of the jumper segments has a first end and a second end opposite to the first end. Each of the spiral structures has an outer end and an inner end. The outer end is connected to one of the two adjacent metal blocks. The inner end is electrically connected to the first end of one of the jumper segments, and the second end of the jumper segment is electrically connected to the other one of the two the metal blocks.

    摘要翻译： 提供了包括第一图案化金属层和第二图案化金属层的电路板。 第一图案化金属层具有金属块和螺旋结构。 在任何两个相邻的金属块之间保持间隙。 每个螺旋结构电连接在任何两个相邻的金属块之间。 第二图案化金属层设置在第一图案化金属层旁边并且具有跨接段。 每个跳线段具有与第一端相对的第一端和第二端。 每个螺旋结构具有外端和内端。 外端连接到两个相邻的金属块中的一个。 内端电连接到一个跳线段的第一端，并且跳线段的第二端电连接到两个金属块中的另一个。