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    THIN FILM TRANSISTOR PANEL AND MANUFACTURING METHOD OF THE SAME
    1.
    发明申请
    THIN FILM TRANSISTOR PANEL AND MANUFACTURING METHOD OF THE SAME 审中-公开
    薄膜晶体管面板及其制造方法

    公开(公告)号：US20090224257A1

    公开(公告)日：2009-09-10

    申请号：US12390076

    申请日：2009-02-20

    申请人： Hong-Kee CHIN ,  Shin-Il CHOI ,  Sang-Gab KIM ,  Min-Seok OH ,  Yu-Gwang JEONG ,  Seung-Ha CHOI ,  Dong-Ju YANG

    发明人： Hong-Kee CHIN ,  Shin-Il CHOI ,  Sang-Gab KIM ,  Min-Seok OH ,  Yu-Gwang JEONG ,  Seung-Ha CHOI ,  Dong-Ju YANG

    IPC分类号： H01L33/00

    CPC分类号： H01L29/458 ,  H01L27/124

    摘要： A thin film transistor array panel includes a gate line formed on a substrate and including a gate electrode, a semiconductor layer formed on a surface of the substrate having the gate line, a data line formed on the semiconductor layer, insulatedly intersecting the gate line, and including a source electrode disposed on the gate electrode, a drain electrode separated from the source electrode by a channel, disposed on the gate electrode, and formed from the same layer as the data line, a passivation layer formed on the data line and the drain electrode and having a first contact hole exposing the drain electrode, and a pixel electrode formed on the passivation layer and contacting the drain electrode through the first contact hole. The data line and the drain electrode may include a first layer and a second layer formed on the first layer, a planar edge of the first layer protrudes from a planar edge of the second layer, and the first layer is formed by dry-etching and the second layer is formed by wet-etching.

    摘要翻译： 薄膜晶体管阵列面板包括形成在基板上并包括栅电极的栅极线，形成在具有栅极线的基板的表面上的半导体层，形成在半导体层上的与栅极线绝缘相交的数据线， 并且包括设置在栅电极上的源电极，通过沟道与源电极分离的漏极，设置在栅电极上，并由与数据线相同的层形成，形成在数据线上的钝化层和 漏极，并且具有暴露漏电极的第一接触孔，以及形成在钝化层上并通过第一接触孔接触漏电极的像素电极。 数据线和漏极可以包括形成在第一层上的第一层和第二层，第一层的平面边缘从第二层的平坦边缘突出，并且第一层通过干蚀刻形成， 第二层通过湿法蚀刻形成。

    THIN FILM TRANSISTOR, METHOD OF FABRICATING THE SAME, AND DISPLAY APPARATUS HAVING THE SAME
    4.
    发明申请
    THIN FILM TRANSISTOR, METHOD OF FABRICATING THE SAME, AND DISPLAY APPARATUS HAVING THE SAME 有权
    薄膜晶体管，其制造方法和显示装置

    公开(公告)号：US20110024752A1

    公开(公告)日：2011-02-03

    申请号：US12900634

    申请日：2010-10-08

    申请人： Shin-Il CHOI ,  Sang-Gab KIM ,  Hong-Kee CHIN ,  Min-Seok OH ,  Yu-Gwang JEONG ,  Seung-Ha CHOI

    发明人： Shin-Il CHOI ,  Sang-Gab KIM ,  Hong-Kee CHIN ,  Min-Seok OH ,  Yu-Gwang JEONG ,  Seung-Ha CHOI

    IPC分类号： H01L29/16 ,  H01L33/16

    CPC分类号： H01L27/124 ,  H01L29/458 ,  H01L29/66765

    摘要： A method of fabricating a thin film transistor includes forming a gate electrode on a substrate, forming a semiconductor layer on the gate electrode, forming a source electrode on the semiconductor layer, forming a drain electrode on the semiconductor layer spaced apart from the source electrode, forming a copper layer pattern on the source electrode and the drain electrode, exposing the copper layer pattern on the source electrode and the drain electrode to a fluorine-containing process gas to form a copper fluoride layer pattern thereon, and patterning the semiconductor layer.

    摘要翻译： 一种薄膜晶体管的制造方法，包括在基板上形成栅电极，在栅电极上形成半导体层，在半导体层上形成源电极，在与源电极间隔开的半导体层上形成漏电极， 在源电极和漏电极上形成铜层图案，将源电极和漏电极上的铜层图案暴露于含氟处理气体，以在其上形成氟化铜层图案，并对该半导体层进行构图。

    DISPLAY SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME
    6.
    发明申请
    DISPLAY SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME 有权
    显示基板及其制造方法

    公开(公告)号：US20070259521A1

    公开(公告)日：2007-11-08

    申请号：US11682907

    申请日：2007-03-07

    申请人： Min-Seok OH ,  Bong-Kyu SHIN ,  Sang-Gab KIM ,  Eun-Guk LEE ,  Hong-Kee CHIN ,  Yu-Gwang JEONG ,  Seung-Ha CHOI

    发明人： Min-Seok OH ,  Bong-Kyu SHIN ,  Sang-Gab KIM ,  Eun-Guk LEE ,  Hong-Kee CHIN ,  Yu-Gwang JEONG ,  Seung-Ha CHOI

    IPC分类号： H01L21/44

    CPC分类号： G02F1/136227 ,  G02F1/13439 ,  G02F2201/50

    摘要： A method of forming a display substrate includes forming an array layer on a substrate, forming a passivation layer on the array layer, forming a photoresist pattern on the passivation layer corresponding to a gate line, a source line and a thin-film transistor of the array layer, etching the passivation layer using the photoresist pattern as a mask Non-uniformly surface treating a surface of the photoresist pattern, forming a transparent electrode layer on the substrate having the surface-treated photoresist pattern formed thereon and forming a pixel electrode. The forming a pixel electrode includes removing the photoresist pattern and the transparent electrode layer, such as by infiltrating a strip solution into the surface-treated photoresist pattern.

    摘要翻译： 形成显示基板的方法包括在基板上形成阵列层，在阵列层上形成钝化层，在对应于栅极线，源极线和薄膜晶体管的钝化层上形成光致抗蚀剂图案 使用光致抗蚀剂图案作为掩模蚀刻钝化层对光致抗蚀剂图案的表面进行非均匀表面处理，在其上形成有表面处理的光致抗蚀剂图案的基板上形成透明电极层并形成像素电极。 形成像素电极包括通过将带状溶液浸入表面处理的光致抗蚀剂图案中去除光致抗蚀剂图案和透明电极层。

    THIN FLIM TRANSISTOR SUBSTRATE AND MANUFACTURING METHOD THEREOF
    8.
    发明申请
    THIN FLIM TRANSISTOR SUBSTRATE AND MANUFACTURING METHOD THEREOF 有权
    薄片晶体管基板及其制造方法

    公开(公告)号：US20120003768A1

    公开(公告)日：2012-01-05

    申请号：US13231225

    申请日：2011-09-13

    申请人： Hong-Kee CHIN ,  Sang-Gab KIM ,  Woong-Kwon KIM ,  Yong-Mo CHOI ,  Seung-Ha CHOI ,  Shin-Il CHOI ,  Ho-Jun LEE ,  Jung-Suk BANG ,  Yu-Gwang JEONG

    发明人： Hong-Kee CHIN ,  Sang-Gab KIM ,  Woong-Kwon KIM ,  Yong-Mo CHOI ,  Seung-Ha CHOI ,  Shin-Il CHOI ,  Ho-Jun LEE ,  Jung-Suk BANG ,  Yu-Gwang JEONG

    IPC分类号： H01L33/16

    CPC分类号： H01L27/12 ,  H01L27/1248 ,  H01L27/1288

    摘要： A thin film transistor (TFT) substrate is provided in which a sufficiently large contact area between conductive materials is provided in a contact portion and a method of fabricating the TFT substrate. The TFT substrate includes a gate interconnection line formed on an insulating substrate, a gate insulating layer covering the gate interconnection line, a semiconductor layer arranged on the gate insulating layer, a data interconnection line including a data line, a source electrode and a drain electrode formed on the semiconductor layer, a first passivation layer formed on the data interconnection line and exposing the drain electrode, a second passivation layer formed on the first passivation film and a pixel electrode electrically connected to the drain electrode. An outer sidewall of the second passivation layer is positioned inside an outer sidewall of the first passivation layer.

    摘要翻译： 提供一种薄膜晶体管（TFT）基板，其中在接触部分中提供导电材料之间的足够大的接触面积以及制造TFT基板的方法。 TFT基板包括形成在绝缘基板上的栅极互连线，覆盖栅极互连线的栅极绝缘层，布置在栅极绝缘层上的半导体层，包括数据线，源极和漏极的数据互连线 形成在所述半导体层上，形成在所述数据互连线上并暴露所述漏电极的第一钝化层，形成在所述第一钝化膜上的第二钝化层和与所述漏电极电连接的像素电极。 第二钝化层的外侧壁位于第一钝化层的外侧壁的内侧。

    METHOD OF MANUFACTURING THIN FILM TRANSISTOR SUBSTRATE AND MANUFACTURING SYSTEM USING THE SAME
    9.
    发明申请
    METHOD OF MANUFACTURING THIN FILM TRANSISTOR SUBSTRATE AND MANUFACTURING SYSTEM USING THE SAME 审中-公开
    制造薄膜晶体管基板的方法和使用该薄膜晶体管基板的制造系统

    公开(公告)号：US20080280379A1

    公开(公告)日：2008-11-13

    申请号：US11933413

    申请日：2007-10-31

    申请人： Min-Seok OH ,  Sang-Gab KIM ,  Hong-Kee CHIN ,  Yu-Gwang JEONG ,  Seung-Ha CHOI ,  Ki-Hyun KIM ,  In-Ho SONG

    发明人： Min-Seok OH ,  Sang-Gab KIM ,  Hong-Kee CHIN ,  Yu-Gwang JEONG ,  Seung-Ha CHOI ,  Ki-Hyun KIM ,  In-Ho SONG

    IPC分类号： H01L21/66 ,  H01L21/67

    CPC分类号： H01L22/12 ,  H01L27/1288 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Provided is a method of manufacturing a thin film transistor substrate and a manufacturing system using the same, wherein the production of corrosive substances is reduced during the process of manufacturing the thin film transistor substrate. The method includes providing an etching unit with an insulation substrate on which a thin metal film has been deposited, and dry-etching the insulation substrate so as to form a predetermined circuit pattern; providing a waiting unit with the insulation substrate waiting to be cleaned; performing a preliminary cleaning operation by a cleaning unit having a plurality of nozzles while the insulation substrate waits and checking the preliminary cleaning operation; and performing a main cleaning operation with regard to the insulation substrate based on the result of the check.

    摘要翻译： 提供一种制造薄膜晶体管基板的方法和使用该薄膜晶体管基板的制造系统，其中在制造薄膜晶体管基板的过程中，腐蚀性物质的产生减少。 该方法包括：提供具有绝缘基板的蚀刻单元，在其上沉积有薄金属膜，并对绝缘基板进行干蚀刻以形成预定的电路图案; 提供等待单元与等待清理的绝缘基板; 在绝缘基板等待并检查预备清洗操作的同时，通过具有多个喷嘴的清洗单元执行初步清洁操作; 并且基于检查结果对绝缘基板进行主清洗操作。