利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

65 条记录 (耗时 0.026 秒)

    Method for manufacturing thin film transistor array panel
    1.
    发明授权
    Method for manufacturing thin film transistor array panel 有权
    制造薄膜晶体管阵列面板的方法

    公开(公告)号：US08557621B2

    公开(公告)日：2013-10-15

    申请号：US13157806

    申请日：2011-06-10

    申请人： Jong-Hyun Choung ,  Yang Ho Bae ,  Jean Ho Song ,  O Sung Seo ,  Sun-Young Hong ,  Hwa Yeul Oh ,  Bong-Kyun Kim ,  Nam Seok Suh ,  Dong-Ju Yang ,  Wang Woo Lee

    发明人： Jong-Hyun Choung ,  Yang Ho Bae ,  Jean Ho Song ,  O Sung Seo ,  Sun-Young Hong ,  Hwa Yeul Oh ,  Bong-Kyun Kim ,  Nam Seok Suh ,  Dong-Ju Yang ,  Wang Woo Lee

    IPC分类号： H01L21/00

    CPC分类号： H01L21/32134 ,  G02F1/136227 ,  H01L27/1288 ,  H01L29/41733

    摘要： A method for manufacturing a thin film transistor array panel, including: sequentially forming a first silicon layer, a second silicon layer, a lower metal layer, and an upper metal layer on a gate insulating layer and a gate line; forming a first film pattern on the upper metal layer; forming a first lower metal pattern and a first upper metal pattern that includes a protrusion, by etching the upper metal layer and the lower metal layer; forming first and second silicon patterns by etching the first and second silicon layers; forming a second film pattern by ashing the first film pattern; forming a second upper metal pattern by etching the first upper metal pattern; forming a data line and a thin film transistor by etching the first lower metal pattern and the first and second silicon patterns; and forming a passivation layer and a pixel electrode on the resultant.

    摘要翻译： 一种制造薄膜晶体管阵列面板的方法，包括：在栅绝缘层和栅极线上依次形成第一硅层，第二硅层，下金属层和上金属层; 在上金属层上形成第一膜图案; 通过蚀刻上金属层和下金属层，形成第一下金属图案和包括突起的第一上金属图案; 通过蚀刻第一和第二硅层形成第一和第二硅图案; 通过灰化第一膜图案形成第二膜图案; 通过蚀刻第一上金属图案形成第二上金属图案; 通过蚀刻第一下金属图案和第一和第二硅图案来形成数据线和薄膜晶体管; 并在所得物上形成钝化层和像素电极。

    Thin film conductor and method of fabrication
    6.
    发明授权
    Thin film conductor and method of fabrication 有权
    薄膜导体和制造方法

    公开(公告)号：US07808108B2

    公开(公告)日：2010-10-05

    申请号：US11502918

    申请日：2006-08-11

    申请人： Beom-seok Cho ,  Je-hun Lee ,  Chang-oh Jeong ,  Yang-ho Bae

    发明人： Beom-seok Cho ,  Je-hun Lee ,  Chang-oh Jeong ,  Yang-ho Bae

    IPC分类号： H01L29/43

    CPC分类号： H01L27/12 ,  H01L27/124

    摘要： A thin film conductor having improved adhesion and superior conductivity, a method for fabricating the same, a thin film transistor (TFT) plate including the thin film conductor, and a method for fabricating the TFT plate are provided. The thin film conductor includes an adhesive layer containing an oxidation-reactive metal or silicidation-reactive metal and silver, a silver conductive layer formed on the adhesive layer, and a protection layer formed on the silver conductive layer and containing an oxidation-reactive metal and silver.

    摘要翻译： 提供了具有改善的粘附性和优异导电性的薄膜导体，其制造方法，包括薄膜导体的薄膜晶体管（TFT）板以及制造TFT板的方法。 薄膜导体包括含有氧化反应性金属或硅化反应性金属和银的粘合剂层，形成在粘合剂层上的银导电层，以及形成在银导电层上并含有氧化反应性金属的保护层， 银。

    DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME
    7.
    发明申请
    DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME 有权
    显示面板及其制造方法

    公开(公告)号：US20090212290A1

    公开(公告)日：2009-08-27

    申请号：US12354115

    申请日：2009-01-15

    申请人： Joo-Ae YOUN ,  Yang-Ho BAE ,  Chang-Oh JEONG ,  Chong-Chul CHAI ,  Pil-Sang YUN ,  Honglong NING ,  Byeong-Beom KIM

    发明人： Joo-Ae YOUN ,  Yang-Ho BAE ,  Chang-Oh JEONG ,  Chong-Chul CHAI ,  Pil-Sang YUN ,  Honglong NING ,  Byeong-Beom KIM

    IPC分类号： H01L27/088 ,  H01L21/77

    CPC分类号： H01L33/0041 ,  H01L27/124 ,  H01L29/458

    摘要： A display panel includes; a lower gate line, a lower data line disposed substantially perpendicular to the lower gate line, a thin film transistor (“TFT”) connected to the lower gate line and the lower data line, an insulating layer disposed on the lower gate line, the lower data line, and the TFT and having a plurality of trenches exposing the lower gate line and the lower data line, an upper gate line disposed in the trench on the lower gate line, an upper data line disposed in the trench on the lower data line, and a pixel electrode connected to the TFT.

    摘要翻译： 显示面板包括： 下栅极线，基本上垂直于下栅极线设置的下数据线，连接到下栅极线和下数据线的薄膜晶体管（“TFT”），设置在下栅极线上的绝缘层， 下数据线和TFT，并且具有暴露下栅极线和下数据线的多个沟槽，设置在下栅极线上的沟槽中的上栅极线，设置在下数据上的沟槽中的上数据线 线和与TFT连接的像素电极。

    THIN FILM TRANSISTOR, THIN FILM TRANSISTOR SUBSTRATE INCLUDING THE SAME AND METHOD OF MANUFACTURING THE SAME
    9.
    发明申请
    THIN FILM TRANSISTOR, THIN FILM TRANSISTOR SUBSTRATE INCLUDING THE SAME AND METHOD OF MANUFACTURING THE SAME 有权
    薄膜晶体管，包括其的薄膜晶体管基板及其制造方法

    公开(公告)号：US20080191213A1

    公开(公告)日：2008-08-14

    申请号：US11932314

    申请日：2007-10-31

    申请人： Yang Ho Bae ,  Chang Oh Jeong ,  Byeong Beom Kim

    发明人： Yang Ho Bae ,  Chang Oh Jeong ,  Byeong Beom Kim

    IPC分类号： H01L29/786 ,  H01L21/336

    CPC分类号： H01L29/458 ,  H01L27/124

    摘要： A thin film transistor showing desirable contact characteristics during contact with indium tin oxide (ITO) or indium zinc oxide (IZO), in which a first conductive pattern including a gate electrode and a second conductive pattern including a source electrode and a drain electrode are formed without an etching process, a TFT substrate including the TFTs, and a method of manufacturing the same. The thin film transistor includes a gate electrode formed of a first conductive layer, a gate insulating layer covering the gate electrode, a semiconductor layer forming a channel on the gate insulating layer; an ohmic contact layer formed on the semiconductor layer, and a source electrode and a drain electrode formed of a second conductive layer and of a third conductive layer. The second conductive layer includes an aluminum-nickel alloy and nitrogen and is formed on the semiconductor layer. The third conductive layer includes an aluminum-nickel alloy and is formed on the second conductive layer.

    摘要翻译： 在与铟锡氧化物（ITO）或铟锌氧化物（IZO）接触期间显示出期望的接触特性的薄膜晶体管，其中形成包括栅电极的第一导电图案和包括源电极和漏电极的第二导电图案 没有蚀刻处理，包括TFT的TFT基板及其制造方法。 薄膜晶体管包括由第一导电层形成的栅电极，覆盖栅电极的栅极绝缘层，在栅极绝缘层上形成沟道的半导体层; 形成在半导体层上的欧姆接触层，以及由第二导电层和第三导电层形成的源电极和漏电极。 第二导电层包括铝 - 镍合金和氮，并形成在半导体层上。 第三导电层包括铝镍合金，并形成在第二导电层上。

    Thin film transistor array panel and method for manufacturing the same
    10.
    发明授权
    Thin film transistor array panel and method for manufacturing the same 有权
    薄膜晶体管阵列面板及其制造方法

    公开(公告)号：US07352004B2

    公开(公告)日：2008-04-01

    申请号：US11249500

    申请日：2005-10-14

    申请人： Je-Hun Lee ,  Yang-Ho Bae ,  Beom-Seok Cho ,  Chang-Oh Jeong

    发明人： Je-Hun Lee ,  Yang-Ho Bae ,  Beom-Seok Cho ,  Chang-Oh Jeong

    IPC分类号： H01L29/04 ,  H01L29/10 ,  H01L31/00

    CPC分类号： H01L27/3279 ,  H01L27/124 ,  H01L27/1288 ,  H01L51/0023 ,  H01L51/56

    摘要： The invention provides a thin film transistor (TFT) array panel that includes an insulating substrate; a gate line formed on the insulating substrate and having a first layer of an Al containing metal, a second layer of a Cu containing metal that is thicker than the first layer, and a gate electrode; a gate insulating layer arranged on the gate line; a semiconductor arranged on the gate insulating layer; a data line having a source electrode and arranged on the gate insulating layer and the semiconductor; a drain electrode arranged on the gate insulating layer and the semiconductor and facing the source electrode; a passivation layer having a contact hole and arranged on the data line and the drain electrode; and a pixel electrode arranged on the passivation layer and coupled with the drain electrode through the contact hole.

    摘要翻译： 本发明提供一种薄膜晶体管（TFT）阵列面板，其包括绝缘基板; 形成在所述绝缘基板上并具有含有Al的金属的第一层，比所述第一层更厚的含Cu金属的第二层的栅极线和栅电极; 栅极绝缘层，布置在栅极线上; 布置在栅绝缘层上的半导体; 数据线，其具有源电极并且布置在所述栅极绝缘层和所述半导体上; 布置在所述栅绝缘层和所述半导体上并面对所述源电极的漏电极; 钝化层，其具有接触孔并且布置在所述数据线和所述漏电极上; 以及设置在钝化层上并通过接触孔与漏电极耦合的像素电极。