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    Electronic translator having removable data memory and controller both connectable to any one of terminals
    3.
    发明授权
    Electronic translator having removable data memory and controller both connectable to any one of terminals 失效
    具有可移动数据存储器和控制器的电子转换器可连接到任何一个终端

    公开(公告)号：US4613944A

    公开(公告)日：1986-09-23

    申请号：US296125

    申请日：1981-08-25

    申请人： Shintaro Hashimoto ,  Masafumi Morimoto ,  Tosaku Nakanishi ,  Hideo Yoshida ,  Shigenobu Yanagiuchi

    发明人： Shintaro Hashimoto ,  Masafumi Morimoto ,  Tosaku Nakanishi ,  Hideo Yoshida ,  Shigenobu Yanagiuchi

    IPC分类号： G11C5/00 ,  G06F9/06 ,  G06F12/06 ,  G06F17/28 ,  G10L13/04 ,  G10L5/00

    CPC分类号： G06F17/289 ,  G06F17/2827 ,  G10L13/00

    摘要： An electronic translator comprising a first memory for providing signals representing a first word or words in a first language, a second memory for providing signals representing a second word or words in a second language, a first connector selectively occupied by at least one of the first and the second memories, a control device for processing the two types of signals, and carry out operations of the translator, and a second connector selectively occupied by the control device. Preferably, either of the first and the second memories is built into the body of the translator. A second control device may be built into the translator for processing the two types of signals and carrying out operations of the translator, in which case the two control devices are operable in the alternative to the exclusion of each other.

    摘要翻译： 一种电子翻译器，包括用于提供代表第一语言的第一个单词或第二单词的信号的第一存储器，用于提供表示第二语言的第二单词或第二单词的信号的第二存储器， 并且第二存储器，用于处理两种类型的信号的控制装置，并且执行翻译器的操作，以及由控制装置有选择地占用的第二连接器。 优选地，第一和第二存储器中的任一个被内置到转换器的主体中。 第二控制装置可以被内置到转换器中，用于处理两种类型的信号并执行翻译器的操作，在这种情况下，两个控制装置可操作以替代彼此排除。

    Electronic translator for specifying a sentence with at least one key word
    5.
    发明授权
    Electronic translator for specifying a sentence with at least one key word 失效
    用于指定至少一个关键字的句子的电子翻译器

    公开(公告)号：US4593356A

    公开(公告)日：1986-06-03

    申请号：US283961

    申请日：1981-07-16

    申请人： Shintaro Hashimoto ,  Masafumi Morimoto ,  Kunio Yoshida ,  Hisao Morinaga ,  Tosaku Nakanishi ,  Shigenobu Yanagiuchi

    发明人： Shintaro Hashimoto ,  Masafumi Morimoto ,  Kunio Yoshida ,  Hisao Morinaga ,  Tosaku Nakanishi ,  Shigenobu Yanagiuchi

    IPC分类号： G06F17/27 ,  G06F17/28 ,  G06F15/38

    CPC分类号： G06F17/2755 ,  G06F17/2872 ,  G06F17/289

    摘要： An electronic translator is featured where a particular sentence is accessed from a memory depending on at least one key word entered. The key word is contained in the particular sentence. A subject category may be selected from a plurality of subject categories and only sentences within the selected category may be searched. The translator comprises an input circuit for entering the key word, and subject category an access means for accessing the key word from the subject category within memory so as to specify and access the sentence, and a detection circuit for detecting whether the key word is accessed from the subject category within memory.

    摘要翻译： 电子翻译器的特征在于根据输入的至少一个关键字从存储器访问特定句子。 关键词包含在特定句子中。 可以从多个主题类别中选择主题类别，并且可以仅搜索所选类别内的句子。 翻译器包括用于输入关键字的输入电路，以及主题类别，用于从存储器内的主题类别访问关键字的访问装置，以便指定和访问该句子;以及检测电路，用于检测关键字是否被访问 从内存中的主题类别。

    Miniaturized key entry and translation circuitry arrangement for a data processing unit
    6.
    发明授权
    Miniaturized key entry and translation circuitry arrangement for a data processing unit 失效
    用于数据处理单元的小型化键入和转换电路装置

    公开(公告)号：US4020467A

    公开(公告)日：1977-04-26

    申请号：US509951

    申请日：1974-09-27

    申请人： Shintaro Hashimoto ,  Tosaku Nakanishi

    发明人： Shintaro Hashimoto ,  Tosaku Nakanishi

    IPC分类号： G06F3/023 ,  G06F3/02

    CPC分类号： G06F3/0232

    摘要： A key entry and translation system useful with data processing units such as electronic calculators for the purpose of entering desired input information from a keyboard in a predetermined code notation into the data processing units. The present system is of a type wherein the input information from the keyboard is sensed and manipulated in an arithmetic circuit contained within a central processor unit (CPU) in response to program instructions stored in a read-only memory (ROM) and then is entered into the data processing unit through an input buffer contained within a random access memory (RAM). Pursuant to the present system, key entries may be registered during arithmetic operations or printing procedures, through the use of a CPU. Furthermore, the present system is adapted to determine whether the input information from the keyboard is either present or absent before interrogation as to the contents of the input information, for the purpose of speeding up arithmetic operations. Utilization of an address selection circuit contained within a RAM for generating key strobe or time-shared interrogate signals provides a considerable reduction in a large scale integrated circuit (LSI) which incorporates the above discussed components on a single semiconductor chip.

    摘要翻译： 一种用于数据处理单元（例如电子计算器）的键入口和翻译系统，用于以预定的代码符号将期望的输入信息从键盘输入到数据处理单元中。 本系统是一种类型，其中响应于存储在只读存储器（ROM）中的程序指令，在包含在中央处理器单元（CPU）中的运算电路中感测和操纵来自键盘的输入信息，然后输入 通过包含在随机存取存储器（RAM）内的输入缓冲器进入数据处理单元。 根据本系统，通过使用CPU可以在算术运算或打印过程中注册密钥输入。 此外，为了加速算术运算，本系统适于确定询问输入信息的内容之前是否存在来自键盘的输入信息。 利用包含在RAM内的地址选择电路用于产生钥匙选通或时间共享的询问信号，使得在单个半导体芯片上结合上述组件的大规模集成电路（LSI）大大减少。

    Electronic sentence translator
    7.
    发明授权
    Electronic sentence translator 失效
    电子句子翻译器

    公开(公告)号：US4597055A

    公开(公告)日：1986-06-24

    申请号：US286534

    申请日：1981-07-24

    申请人： Shintaro Hashimoto ,  Masafumi Morimoto ,  Kunio Yoshida ,  Hisao Morinaga ,  Tosaku Nakanishi ,  Shigenobu Yanagiuchi

    发明人： Shintaro Hashimoto ,  Masafumi Morimoto ,  Kunio Yoshida ,  Hisao Morinaga ,  Tosaku Nakanishi ,  Shigenobu Yanagiuchi

    IPC分类号： G06F17/27 ,  G06F17/28 ,  G06F15/38

    CPC分类号： G06F17/2765 ,  G06F17/289

    摘要： An electronic translator is characterized in that a new translated sentence is prepared by using at least one word contained in a sentence key inputted those cases where no word corresponding to the word is stored in a memory for storing a plurality of translated words. The translator comprises an input circuit for inputting the sentence, an access circuit for accessing a most equivalent translated sentence, and a detection circuit for detecting whether all of the words contained in the sentence are stored in memory and for inserting such unstored words directly into the translated sentence.

    摘要翻译： 一种电子翻译器，其特征在于，通过使用输入那些不存在多个翻译单词的存储器中存储有与该单词对应的单词的情况的句子键中包含的至少一个单词来准备新的翻译句子。 翻译器包括用于输入句子的输入电路，用于访问最相同翻译的句子的访问电路，以及检测电路，用于检测包含在句子中的所有词是否存储在存储器中，并将这些未排序的单词直接插入到 翻译句子

    Electronic device for bidirectional translation
    9.
    发明授权
    Electronic device for bidirectional translation 失效
    用于双向翻译的电子设备

    公开(公告)号：US4733368A

    公开(公告)日：1988-03-22

    申请号：US885822

    申请日：1986-07-15

    申请人： Masafumi Morimoto ,  Kunio Yoshida ,  Tosaku Nakanishi

    发明人： Masafumi Morimoto ,  Kunio Yoshida ,  Tosaku Nakanishi

    IPC分类号： G06F17/27 ,  G06F17/28 ,  G06F13/38

    CPC分类号： G06F17/2735 ,  G06F17/2755 ,  G06F17/2872 ,  G06F17/289

    摘要： An electronic translator comprises an input device for entering a first word or words, a first memory circuit for storing the first words, a second memory circuit for storing second words equivalent to the first words, an access circuit for addressing the memory circuits to cause retrieval of the first word or words, or alternately the second word or words, and a control circuit for controlling activation of the access circuit. There may be additionally provided a holding circuit for holding one or more of the first words without translation thereof.

    摘要翻译： 电子翻译器包括用于输入第一个字的输入装置，用于存储第一个字的第一存储器电路，用于存储与第一个字相当的第二个字的第二存储器电路，用于寻址存储器电路以引起检索的存取电路 的第一个字或第二个字或第二个字，以及一个控制电路，用于控制存取电路的激活。 可以另外提供一种用于保持一个或多个第一个字而不进行翻译的保持电路。

    Method and apparatus for serial communication with a co-processor
    10.
    发明授权
    Method and apparatus for serial communication with a co-processor 有权
    与协处理器进行串行通信的方法和装置

    公开(公告)号：US06735659B1

    公开(公告)日：2004-05-11

    申请号：US09746086

    申请日：2000-12-21

    申请人： Tosaku Nakanishi ,  Siripong Sritanyaratana

    发明人： Tosaku Nakanishi ,  Siripong Sritanyaratana

    IPC分类号： G06F1314

    CPC分类号： G06F13/4291 ,  Y02D10/14 ,  Y02D10/151

    摘要： A method and apparatus for serial communication with a co-processor. In one embodiment, a microprocessor is provided with a CPU core, set of serial interface registers, a serial interface unit, to provide serial communication between a co-processor and the microprocessor. The set of serial interface registers is part of a register file of the CPU core and interrupts are exchanged between the CPU core and the co-processor to allow for reading and writing of data placed in the serial registers of the register file.

    摘要翻译： 一种用于与协处理器进行串行通信的方法和装置。 在一个实施例中，微处理器设置有CPU核心，串行接口寄存器集合，串行接口单元，以在协处理器和微处理器之间提供串行通信。 串行接口寄存器组是CPU内核寄存器文件的一部分，CPU核和协处理器之间进行中断交换，以允许对写入寄存器文件串行寄存器的数据进行读写。