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    Method and apparatus for serial communication with a co-processor
    1.
    发明授权
    Method and apparatus for serial communication with a co-processor 有权
    与协处理器进行串行通信的方法和装置

    公开(公告)号：US06735659B1

    公开(公告)日：2004-05-11

    申请号：US09746086

    申请日：2000-12-21

    申请人： Tosaku Nakanishi ,  Siripong Sritanyaratana

    发明人： Tosaku Nakanishi ,  Siripong Sritanyaratana

    IPC分类号： G06F1314

    CPC分类号： G06F13/4291 ,  Y02D10/14 ,  Y02D10/151

    摘要： A method and apparatus for serial communication with a co-processor. In one embodiment, a microprocessor is provided with a CPU core, set of serial interface registers, a serial interface unit, to provide serial communication between a co-processor and the microprocessor. The set of serial interface registers is part of a register file of the CPU core and interrupts are exchanged between the CPU core and the co-processor to allow for reading and writing of data placed in the serial registers of the register file.

    摘要翻译： 一种用于与协处理器进行串行通信的方法和装置。 在一个实施例中，微处理器设置有CPU核心，串行接口寄存器集合，串行接口单元，以在协处理器和微处理器之间提供串行通信。 串行接口寄存器组是CPU内核寄存器文件的一部分，CPU核和协处理器之间进行中断交换，以允许对写入寄存器文件串行寄存器的数据进行读写。

    Method, apparatus and article for display unit power management
    2.
    发明授权
    Method, apparatus and article for display unit power management 有权
    显示单元电源管理的方法，设备和文章

    公开(公告)号：US07119803B2

    公开(公告)日：2006-10-10

    申请号：US10331499

    申请日：2002-12-30

    申请人： Randy P. Stanley ,  Siripong Sritanyaratana

    发明人： Randy P. Stanley ,  Siripong Sritanyaratana

    IPC分类号： G09G5/00 ,  G06F1/26

    CPC分类号： G09G5/00 ,  G09G2320/106 ,  G09G2330/021

    摘要： A method to manage the power consumption of a display unit is provided. The method determines if a graphics-intensive event is occurring, uses a first refresh rate if the graphics-intensive event is occurring, and uses a second refresh rate different than the first refresh rate if the graphics-intensive event is not occurring. An apparatus for performing the method, and an article including a machine-accessible medium that provides instructions that, if executed by a processor, will cause the processor to perform the method are also provided.

    摘要翻译： 提供了一种管理显示单元的功耗的方法。 该方法确定是否发生图形密集型事件，如果图形密集型事件正在发生，则使用第一刷新率，并且如果未出现图形密集型事件，则使用与第一刷新率不同的第二刷新率。 一种用于执行该方法的装置，以及包括机器可访问介质的物品，其提供如果由处理器执行将导致处理器执行该方法的指令。

    Bus power savings using selective inversion in an ECC system
    4.
    发明授权
    Bus power savings using selective inversion in an ECC system 有权
    在ECC系统中使用选择性反转的总线功率节省

    公开(公告)号：US06490703B1

    公开(公告)日：2002-12-03

    申请号：US09410380

    申请日：1999-09-30

    申请人： Erik A. de la Iglesia ,  Pochang Hsu ,  Rajendra M. Abhyankar ,  Siripong Sritanyaratana

    发明人： Erik A. de la Iglesia ,  Pochang Hsu ,  Rajendra M. Abhyankar ,  Siripong Sritanyaratana

    IPC分类号： G06F1100

    CPC分类号： G06F11/1008 ,  G06F13/4217 ,  Y02D10/14 ,  Y02D10/151

    摘要： The present invention relates to an error correction and selective inversion circuit (ESIC). The ESIC includes a power-on logic state (POLS) bus having a data signal and an error code correction (ECC) generator having an input coupled to the POLS bus. The ECC generator includes one or more correction pins. The ESIC also includes an inversion generator having an input attached to the POLS bus in parallel with the ECC generator. The output of the inversion generator is integrated with the output of on or more correction pins from the ECC generator so as to form an inverted data signal output. An inverted data signal is recovered by the ESIC in an inversion recovery.

    摘要翻译： 本发明涉及纠错和选择反转电路（ESIC）。 ESIC包括具有数据信号的加电逻辑状态（POLS）总线和具有耦合到POLS总线的输入的错误代码校正（ECC）发生器。 ECC发生器包括一个或多个校正引脚。 ESIC还包括反向发生器，其具有与ECC发生器并联的附接到POLS总线的输入。 反相发生器的输出与来自ECC发生器的多个校正引脚的输出集成，以形成反相数据信号输出。 反转数据信号由反转恢复中的ESIC恢复。

    Partially integrating wireless components of processor-based systems
    6.
    发明授权
    Partially integrating wireless components of processor-based systems 有权
    部分集成基于处理器的系统的无线组件

    公开(公告)号：US07346017B2

    公开(公告)日：2008-03-18

    申请号：US10091328

    申请日：2002-03-05

    申请人： Jeffrey L. Huckins ,  Siripong Sritanyaratana

    发明人： Jeffrey L. Huckins ,  Siripong Sritanyaratana

    IPC分类号： G08C17/00

    CPC分类号： G06F13/102 ,  Y02D10/14

    摘要： A capability may include a pair of functions, one of which is integrated into a platform and the other of which is only available through an add-in card. A mating manager may determine whether both functions are available and if so, coordinate the operations of those functions. As a result, platforms may be released with the capability to be augmented thereafter by those users who choose to provide the add-in cards needed to implement the capability. A wireless network capability may be partially integrated into platforms, with additional components needed to actually implement the wireless capability provided through add-in cards. The add-in card may perform wake packet filtering to avoid excessively awakening the platform.

    摘要翻译： 能力可以包括一对功能，其中一个功能被集成到一个平台中，另一个功能只能通过附加卡获得。 交配经理可以确定两个功能是否可用，如果是，则协调这些功能的操作。 因此，平台可以随后被选择提供实现该功能所需的附加卡的用户放大。 无线网络功能可以部分地集成到平台中，其中需要附加组件来实际实现通过附加卡提供的无线能力。 附加卡可以执行唤醒包过滤以避免过度唤醒平台。

    Bus power savings using selective inversion in an ECC system
    8.
    发明授权
    Bus power savings using selective inversion in an ECC system 失效
    在ECC系统中使用选择性反转的总线功率节省

    公开(公告)号：US06732288B2

    公开(公告)日：2004-05-04

    申请号：US10236338

    申请日：2002-09-06

    申请人： Erik A. de la Iglesia ,  Pochang Hsu ,  Rajendra M. Abhyankar ,  Siripong Sritanyaratana

    发明人： Erik A. de la Iglesia ,  Pochang Hsu ,  Rajendra M. Abhyankar ,  Siripong Sritanyaratana

    IPC分类号： G06F126

    CPC分类号： G06F11/1008 ,  G06F13/4217 ,  Y02D10/14 ,  Y02D10/151

    摘要： The present invention relates to an error correction and selective inversion circuit (ESIC). The ESIC includes a power-on logic state (POLS) bus having a data signal and an error code correction (ECC) generator having an input coupled to the POLS bus. The ECC generator includes one or more correction pins. The ESIC also includes an inversion generator having an input attached to the POLS bus in parallel with the ECC generator. The output of the inversion generator is integrated with the output of on or more correction pins from the ECC generator so as to form an inverted data signal output. An inverted data signal is recovered by the ESIC in an inversion recovery.

    摘要翻译： 本发明涉及纠错和选择反转电路（ESIC）。 ESIC包括具有数据信号的加电逻辑状态（POLS）总线和具有耦合到POLS总线的输入的错误代码校正（ECC）发生器。 ECC发生器包括一个或多个校正引脚。 ESIC还包括反向发生器，其具有与ECC发生器并联的附接到POLS总线的输入。 反相发生器的输出与来自ECC发生器的多个校正引脚的输出集成，以形成反相数据信号输出。 反转数据信号由反转恢复中的ESIC恢复。

    Method and apparatus for displaying graphics based on frame selection indicators
    9.
    发明授权
    Method and apparatus for displaying graphics based on frame selection indicators 有权
    基于帧选择指标显示图形的方法和装置

    公开(公告)号：US06452610B1

    公开(公告)日：2002-09-17

    申请号：US09216013

    申请日：1998-12-16

    申请人： Dennis Reinhardt ,  Siripong Sritanyaratana

    发明人： Dennis Reinhardt ,  Siripong Sritanyaratana

    IPC分类号： G06F314

    CPC分类号： H04N21/4621 ,  G09G5/00 ,  G09G2340/02 ,  H04N21/440281

    摘要： A method for displaying graphics in a computer system. In one embodiment, the method includes a step of receiving a stream of data into the main memory of the computer system. This stream of data comprises a series of descriptions of digital video frames and a series of indicators, each of which corresponds to a set, or a group of one or more, of the video frame descriptions. Each indicator indicates a basis for selecting a subset of the set of video frame descriptions. For example, in one embodiment thirty video frame descriptions are in each set, and a given indicator indicates that half of those thirty descriptions should be included in the corresponding subset. Then, only the fifteen video frame descriptions selected for inclusion in the subset are decompressed, and only the fifteen resulting video frames are displayed, while the other fifteen frames are dropped. By reducing the total number of frame descriptions to be decompressed and displayed, system activity can be reduced, thereby reducing the possibility that power management utilities will be invoked. By using the indicator as the basis for determining when to drop frames and/or which frames are to be dropped instead of allowing power management utilites to make the determination, the video as displayed can be improved according to some predetermined policy.

    摘要翻译： 一种在计算机系统中显示图形的方法。 在一个实施例中，该方法包括将数据流接收到计算机系统的主存储器中的步骤。 该数据流包括数字视频帧和一系列指示符的一系列描述，每个指示符对应于视频帧描述中的一组或一组或多个。 每个指示符指示用于选择视频帧描述集合的子集的基础。 例如，在一个实施例中，每个集合中有三十个视频帧描述，并且给定的指示符指示这三十个描述中的一半应该被包括在相应的子集中。 然后，仅选择包含在子集中的十五个视频帧描述被解压缩，并且仅显示十五个所得到的视频帧，而其他十五个帧被丢弃。 通过减少要解压缩和显示的帧描述的总数，可以减少系统活动，从而减少电源管理实用程序被调用的可能性。 通过使用指示符作为确定何时丢弃帧和/或哪些帧被丢弃的基础，而不是允许电源管理功能进行确定，可以根据某些预定策略来改善所显示的视频。