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    Clamping Inductive Flyback Voltage to Reduce Power Dissipation
    2.
    发明申请
    Clamping Inductive Flyback Voltage to Reduce Power Dissipation 审中-公开

    公开(公告)号：US20180375325A1

    公开(公告)日：2018-12-27

    申请号：US15629949

    申请日：2017-06-22

    Applicant: Silicon Laboratories Inc.

    Inventor： Sean A. Lofthouse ,  Alan L. Westwick

    IPC: H02H9/04 ,  H03K17/08

    Abstract: A switch controls current to be supplied to an inductive load when turned on. A clamp circuit clamps a flyback voltage resulting from turning off the switch. The clamp circuit has a first clamping voltage responsive to the switch being turned off, and has a second clamping voltage, higher than the first clamping voltage, responsive to a current level through the inductive load being lower than a predetermined current level. That ensures that as the current comes down to levels required to break contact, the clamp voltage is increased to speed the collapse of the magnetic field when needed to minimize contact wear by maintaining armature momentum.

    Apparatus for gain selection with compensation for parasitic elements and associated methods
    3.
    发明授权
    Apparatus for gain selection with compensation for parasitic elements and associated methods 有权
    用于增益选择的装置，用于补偿寄生元件和相关方法

    公开(公告)号：US09515671B1

    公开(公告)日：2016-12-06

    申请号：US14732701

    申请日：2015-06-06

    Applicant: Silicon Laboratories Inc.

    Inventor： Axel Thomsen ,  Alan L. Westwick ,  Ricky Setiawan ,  Rex Wong Tak Ying

    IPC: H03M1/00 ,  H03M1/06 ,  H03K5/003 ,  H03M1/66

    CPC classification number: H03M1/0607 ,  H03K5/003 ,  H03M1/00 ,  H03M1/002 ,  H03M1/0609 ,  H03M1/66 ,  H03M1/664 ,  H03M1/682 ,  H03M1/747 ,  H03M1/808

    Abstract: Apparatus and associated methods are disclosed for gain programming or selection with parasitic element compensation. In one exemplary embodiment, an apparatus includes a first circuit that has a first programmable gain, and includes a first set of components having parasitic elements. The apparatus also includes a second circuit that has a second programmable gain, and includes a second set of components having parasitic elements. The apparatus has a gain that is a product of the first and second programmable gains. A gain error because of the parasitic elements of the first and second sets of components is canceled by setting the first programmable gain as a reciprocal of the second programmable gain.

    Abstract translation: 公开了用于利用寄生元件补偿进行增益编程或选择的装置和相关方法。 在一个示例性实施例中，装置包括具有第一可编程增益的第一电路，并且包括具有寄生元件的第一组分量。 该装置还包括具有第二可编程增益的第二电路，并且包括具有寄生元件的第二组分量。 该装置具有作为第一和第二可编程增益的乘积的增益。 通过将第一可编程增益设置为第二可编程增益的倒数来消除由于第一和第二组分组的寄生元件引起的增益误差。

    APPARATUS FOR DIGITAL-TO-ANALOG CONVERSION WITH IMPROVED PERFORMANCE AND ASSOCIATED METHODS
    4.
    发明申请
    APPARATUS FOR DIGITAL-TO-ANALOG CONVERSION WITH IMPROVED PERFORMANCE AND ASSOCIATED METHODS 有权
    具有改进性能和相关方法的数字到模拟转换的设备

    公开(公告)号：US20160359497A1

    公开(公告)日：2016-12-08

    申请号：US14732700

    申请日：2015-06-06

    Applicant: Silicon Laboratories Inc.

    Inventor： Axel Thomsen ,  Alan L. Westwick

    IPC: H03M1/06 ,  H03M1/68 ,  H03M1/00 ,  H03M1/66

    CPC classification number: H03M1/0607 ,  H03K5/003 ,  H03M1/00 ,  H03M1/002 ,  H03M1/0609 ,  H03M1/66 ,  H03M1/664 ,  H03M1/682 ,  H03M1/747 ,  H03M1/808

    Abstract: Apparatus and associated methods are disclosed for digital-to-analog conversion with improved performance. In one exemplary embodiment, an apparatus includes a DAC to convert a digital input signal to an analog output signal. The DAC includes a decoder to decode the digital input signal and to provide first and second sets of control signals. The DAC also includes a resistor DAC (RDAC) to provide first and second voltages in response to the first set of control signals. The DAC further includes an interpolator coupled to receive the first and second voltages and to provide a first analog signal in response to the second set of control signals.

    Abstract translation: 公开了用于具有改进的性能的数模转换的装置和相关方法。 在一个示例性实施例中，装置包括将数字输入信号转换为模拟输出信号的DAC。 DAC包括解码器以解码数字输入信号并提供第一和第二组控制信号。 DAC还包括电阻DAC（RDAC），以响应于第一组控制信号来提供第一和第二电压。 DAC还包括内插器，其被耦合以接收第一和第二电压并且响应于第二组控制信号而提供第一模拟信号。

    Apparatus for Offset Trimming and Associated Methods
    8.
    发明申请
    Apparatus for Offset Trimming and Associated Methods 有权
    偏移修整和相关方法的设备

    公开(公告)号：US20160359496A1

    公开(公告)日：2016-12-08

    申请号：US14732702

    申请日：2015-06-06

    Applicant: Silicon Laboratories Inc.

    Inventor： Axel Thomsen ,  Alan L. Westwick ,  Ricky Setiawan ,  Rex Wong Tak Ying

    IPC: H03M1/06 ,  H03M1/66 ,  H03M1/00 ,  H03K5/003

    CPC classification number: H03M1/0607 ,  H03K5/003 ,  H03M1/00 ,  H03M1/002 ,  H03M1/0609 ,  H03M1/66 ,  H03M1/664 ,  H03M1/682 ,  H03M1/747 ,  H03M1/808

    Abstract: Apparatus and associated methods are disclosed for gain and offset trimming. In one exemplary embodiment, an apparatus includes a first circuit that includes a first transconductance stage to generate a first current. The first circuit has an output offset. The apparatus further includes an offset trim circuit, which includes a second circuit to provide an output voltage selectable from a plurality of voltage values, and a second transconductance stage to generate a second current in response to the output voltage of the second circuit. The output offset of the first circuit is trimmed by adding the second current to the first current.

    Abstract translation: 公开了用于增益和偏移修整的装置和相关方法。 在一个示例性实施例中，一种装置包括第一电路，其包括产生第一电流的第一跨导级。 第一个电路具有输出偏移。 该装置还包括偏移调整电路，其包括提供从多个电压值可选择的输出电压的第二电路和第二跨导级，以响应于第二电路的输出电压产生第二电流。 通过将第二电流加到第一电流来修整第一电路的输出偏移。

    APPARATUS FOR GAIN SELECTION WITH COMPENSATION FOR PARASITIC ELEMENTS AND ASSOCIATED METHODS
    9.
    发明申请
    APPARATUS FOR GAIN SELECTION WITH COMPENSATION FOR PARASITIC ELEMENTS AND ASSOCIATED METHODS 有权
    用于增益选择的装置用于PARASITICELEMENTS和相关方法的补偿

    公开(公告)号：US20160359495A1

    公开(公告)日：2016-12-08

    申请号：US14732701

    申请日：2015-06-06

    Applicant: Silicon Laboratories Inc.

    Inventor： Axel Thomsen ,  Alan L. Westwick ,  Ricky Setiawan ,  Rex Wong Tak Ying

    IPC: H03M1/06 ,  H03M1/00 ,  H03M1/66 ,  H03K5/003

    CPC classification number: H03M1/0607 ,  H03K5/003 ,  H03M1/00 ,  H03M1/002 ,  H03M1/0609 ,  H03M1/66 ,  H03M1/664 ,  H03M1/682 ,  H03M1/747 ,  H03M1/808

    Abstract: Apparatus and associated methods are disclosed for gain programming or selection with parasitic element compensation. In one exemplary embodiment, an apparatus includes a first circuit that has a first programmable gain, and includes a first set of components having parasitic elements. The apparatus also includes a second circuit that has a second programmable gain, and includes a second set of components having parasitic elements. The apparatus has a gain that is a product of the first and second programmable gains. A gain error because of the parasitic elements of the first and second sets of components is canceled by setting the first programmable gain as a reciprocal of the second programmable gain.

    Abstract translation: 公开了用于利用寄生元件补偿进行增益编程或选择的装置和相关方法。 在一个示例性实施例中，装置包括具有第一可编程增益的第一电路，并且包括具有寄生元件的第一组分量。 该装置还包括具有第二可编程增益的第二电路，并且包括具有寄生元件的第二组分量。 该装置具有作为第一和第二可编程增益的乘积的增益。 通过将第一可编程增益设置为第二可编程增益的倒数来消除由于第一和第二组分组的寄生元件引起的增益误差。

    Apparatus for offset trimming and associated methods
    10.
    发明授权
    Apparatus for offset trimming and associated methods 有权
    偏移修整装置及相关方法

    公开(公告)号：US09503113B1

    公开(公告)日：2016-11-22

    申请号：US14732702

    申请日：2015-06-06

    Applicant: Silicon Laboratories Inc.

    Inventor： Axel Thomsen ,  Alan L. Westwick ,  Ricky Setiawan ,  Rex Wong Tak Ying

    IPC: H03M1/06 ,  H03K5/003 ,  H03M1/66 ,  H03M1/00 ,  H03M1/74

    CPC classification number: H03M1/0607 ,  H03K5/003 ,  H03M1/00 ,  H03M1/002 ,  H03M1/0609 ,  H03M1/66 ,  H03M1/664 ,  H03M1/682 ,  H03M1/747 ,  H03M1/808

    Abstract: Apparatus and associated methods are disclosed for gain and offset trimming. In one exemplary embodiment, an apparatus includes a first circuit that includes a first transconductance stage to generate a first current. The first circuit has an output offset. The apparatus further includes an offset trim circuit, which includes a second circuit to provide an output voltage selectable from a plurality of voltage values, and a second transconductance stage to generate a second current in response to the output voltage of the second circuit. The output offset of the first circuit is trimmed by adding the second current to the first current.

    Abstract translation: 公开了用于增益和偏移修整的装置和相关方法。 在一个示例性实施例中，一种装置包括第一电路，其包括产生第一电流的第一跨导级。 第一个电路具有输出偏移。 该装置还包括偏移调整电路，其包括提供从多个电压值可选择的输出电压的第二电路和第二跨导级，以响应于第二电路的输出电压而产生第二电流。 通过将第二电流加到第一电流来修整第一电路的输出偏移。

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