公开(公告)号：US09548090B2

公开(公告)日：2017-01-17

申请号：US14984779

申请日：2015-12-30

Applicant: Socionext Inc.

Inventor： Morimi Arita ,  Tomoya Tsuruta ,  Tomoyuki Yamada

IPC: G11C5/14 ,  G11C7/22

CPC classification number: G11C7/222 ,  G11C5/148 ,  G11C8/08 ,  G11C11/418 ,  G11C29/021 ,  G11C29/025 ,  G11C29/028 ,  G11C29/50 ,  G11C2029/1202 ,  G11C2029/5002

Abstract: Characteristics of each transistor in a semiconductor device including a transistor of a memory cell are measured by an ASV monitoring circuit, a power supply voltage supplied to the semiconductor device is determined based on the measured characteristics of the transistor, a data read-out speed of the memory cell under the determined power supply voltage supplied is measured while changing a signal level of a word line by an SRAM word line monitoring circuit, the signal level of the word line is determined by comparing the measured data read-out speed of the memory cell and a specification range of the memory cell, and the signal level of the word line is appropriately set at the power supply voltage applied by the ASV.

Abstract translation: 通过ASV监视电路来测量包括存储单元的晶体管的半导体器件中的每个晶体管的特性，基于所测量的晶体管的特性来确定提供给半导体器件的电源电压，数据读出速度 在通过SRAM字线监视电路改变字线的信号电平的同时测量所提供的所确定的电源电压下的存储单元，通过比较存储器的测量数据读出速度来确定字线的信号电平 单元和存储单元的规格范围，并且在由ASV施加的电源电压下适当地设置字线的信号电平。

公开(公告)号：US20160211013A1

公开(公告)日：2016-07-21

申请号：US14951042

申请日：2015-11-24

Applicant: Socionext Inc.

Inventor： Shunsuke HARADA ,  Morimi Arita

IPC: G11C11/419 ,  G11C5/14 ,  G11C7/12

CPC classification number: G11C11/419 ,  G11C5/147 ,  G11C7/12 ,  G11C11/24 ,  G11C11/40 ,  G11C11/401

Abstract: A bit line precharging circuit includes a first switch that connects a bit line to a first power source, a second switch that connects the bit line to a second power source whose voltage value is higher than voltage value of the first power source, and a control circuit including a delay element and configured to bring the second switch into conduction after a delay time by the delay element after bringing the first switch into conduction at the time of precharge of the bit line.

Abstract translation: 位线预充电电路包括将位线连接到第一电源的第一开关，将位线连接到电压值高于第一电源的电压值的第二电源的第二开关，以及控制 电路，其包括延迟元件，并且被配置为在所述位线的预充电时使所述第一开关导通之后，使所述延迟元件在延迟时间之后导通所述第二开关。

公开(公告)号：US09601186B2

公开(公告)日：2017-03-21

申请号：US14951042

申请日：2015-11-24

Applicant: Socionext Inc.

Inventor： Shunsuke Harada ,  Morimi Arita

IPC: G11C11/40 ,  G11C11/419 ,  G11C7/12 ,  G11C5/14 ,  G11C11/401 ,  G11C11/24

CPC classification number: G11C11/419 ,  G11C5/147 ,  G11C7/12 ,  G11C11/24 ,  G11C11/40 ,  G11C11/401

Abstract: A bit line precharging circuit includes a first switch that connects a bit line to a first power source, a second switch that connects the bit line to a second power source whose voltage value is higher than voltage value of the first power source, and a control circuit including a delay element and configured to bring the second switch into conduction after a delay time by the delay element after bringing the first switch into conduction at the time of precharge of the bit line.

公开(公告)号：US20160225421A1

公开(公告)日：2016-08-04

申请号：US14984779

申请日：2015-12-30

Applicant: Socionext Inc.

Inventor： Morimi Arita ,  Tomoya Tsuruta ,  Tomoyuki Yamada

IPC: G11C7/22 ,  G11C5/14

CPC classification number: G11C7/222 ,  G11C5/148 ,  G11C8/08 ,  G11C11/418 ,  G11C29/021 ,  G11C29/025 ,  G11C29/028 ,  G11C29/50 ,  G11C2029/1202 ,  G11C2029/5002

Abstract: Characteristics of each transistor in a semiconductor device including a transistor of a memory cell are measured by an ASV monitoring circuit, a power supply voltage supplied to the semiconductor device is determined based on the measured characteristics of the transistor, a data read-out speed of the memory cell under the determined power supply voltage supplied is measured while changing a signal level of a word line by an SRAM word line monitoring circuit, the signal level of the word line is determined by comparing the measured data read-out speed of the memory cell and a specification range of the memory cell, and the signal level of the word line is appropriately set at the power supply voltage applied by the ASV.

Abstract translation: 通过ASV监视电路来测量包括存储单元的晶体管的半导体器件中的每个晶体管的特性，基于所测量的晶体管的特性来确定提供给半导体器件的电源电压，数据读出速度 在通过SRAM字线监视电路改变字线的信号电平的同时测量所提供的所确定的电源电压下的存储单元，通过比较存储器的测量数据读出速度来确定字线的信号电平 单元和存储单元的规格范围，并且在由ASV施加的电源电压下适当地设置字线的信号电平。