Adjustment method of signal level in semiconductor device and semiconductor device
    1.
    发明授权
    Adjustment method of signal level in semiconductor device and semiconductor device 有权
    半导体器件和半导体器件中信号电平的调整方法

    公开(公告)号:US09548090B2

    公开(公告)日:2017-01-17

    申请号:US14984779

    申请日:2015-12-30

    Applicant: Socionext Inc.

    Abstract: Characteristics of each transistor in a semiconductor device including a transistor of a memory cell are measured by an ASV monitoring circuit, a power supply voltage supplied to the semiconductor device is determined based on the measured characteristics of the transistor, a data read-out speed of the memory cell under the determined power supply voltage supplied is measured while changing a signal level of a word line by an SRAM word line monitoring circuit, the signal level of the word line is determined by comparing the measured data read-out speed of the memory cell and a specification range of the memory cell, and the signal level of the word line is appropriately set at the power supply voltage applied by the ASV.

    Abstract translation: 通过ASV监视电路来测量包括存储单元的晶体管的半导体器件中的每个晶体管的特性,基于所测量的晶体管的特性来确定提供给半导体器件的电源电压,数据读出速度 在通过SRAM字线监视电路改变字线的信号电平的同时测量所提供的所确定的电源电压下的存储单元,通过比较存储器的测量数据读出速度来确定字线的信号电平 单元和存储单元的规格范围,并且在由ASV施加的电源电压下适当地设置字线的信号电平。

    Ring oscillator and semiconductor device
    3.
    发明授权
    Ring oscillator and semiconductor device 有权
    环形振荡器和半导体器件

    公开(公告)号:US09240247B2

    公开(公告)日:2016-01-19

    申请号:US13929546

    申请日:2013-06-27

    Applicant: SOCIONEXT INC.

    Inventor: Tomoya Tsuruta

    Abstract: A ring oscillator includes a plurality of ring-connected delay circuits. At least one of the plurality of delay circuits has an SRAM cell and a path circuit connected in parallel to the SRAM cell. The SRAM cell outputs an output signal from a second node to the delay circuit in the next stage within the plurality of delay circuits in response to one of rise transition and fall transition of a signal to be input to a first node from the delay circuit in the previous stage within the plurality of delay circuits. The path circuit outputs an output signal to the delay circuit in the next stage in response to the other transition of the one of transitions.

    Abstract translation: 环形振荡器包括多个环形延迟电路。 多个延迟电路中的至少一个具有与SRAM单元并联连接的SRAM单元和路径电路。 响应于要从延迟电路输入到第一节点的信号的上升转变和下降转换中的一个,SRAM单元在多个延迟电路内将来自第二节点的输出信号从第二节点输出到延迟电路, 多个延迟电路中的前一级。 路径电路响应于一个转换的另一个转换,在下一级向延迟电路输出输出信号。

    Semiconductor integrated circuit device

    公开(公告)号:US12094882B2

    公开(公告)日:2024-09-17

    申请号:US17719052

    申请日:2022-04-12

    Applicant: Socionext Inc.

    CPC classification number: H01L27/11807 H01L2027/11881

    Abstract: In a power line structure for supplying power to standard cells, buried power lines extending in the X direction are placed at a given spacing in the Y direction. A local power line extending in the Y direction is connected with the buried power lines. Metal power lines extending in the X direction are formed in an upper-layer metal interconnect layer and connected with the local power line. The spacing of placement of the metal power lines in the Y direction is greater than the spacing of placement of the buried power lines.

    ADJUSTMENT METHOD OF SIGNAL LEVEL IN SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
    5.
    发明申请
    ADJUSTMENT METHOD OF SIGNAL LEVEL IN SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE 有权
    半导体器件和半导体器件中信号电平的调整方法

    公开(公告)号:US20160225421A1

    公开(公告)日:2016-08-04

    申请号:US14984779

    申请日:2015-12-30

    Applicant: Socionext Inc.

    Abstract: Characteristics of each transistor in a semiconductor device including a transistor of a memory cell are measured by an ASV monitoring circuit, a power supply voltage supplied to the semiconductor device is determined based on the measured characteristics of the transistor, a data read-out speed of the memory cell under the determined power supply voltage supplied is measured while changing a signal level of a word line by an SRAM word line monitoring circuit, the signal level of the word line is determined by comparing the measured data read-out speed of the memory cell and a specification range of the memory cell, and the signal level of the word line is appropriately set at the power supply voltage applied by the ASV.

    Abstract translation: 通过ASV监视电路来测量包括存储单元的晶体管的半导体器件中的每个晶体管的特性,基于所测量的晶体管的特性来确定提供给半导体器件的电源电压,数据读出速度 在通过SRAM字线监视电路改变字线的信号电平的同时测量所提供的所确定的电源电压下的存储单元,通过比较存储器的测量数据读出速度来确定字线的信号电平 单元和存储单元的规格范围,并且在由ASV施加的电源电压下适当地设置字线的信号电平。

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