Multiply-accumulate calculation method and circuit suitable for neural network

    公开(公告)号:US10984313B2

    公开(公告)日:2021-04-20

    申请号:US16757421

    申请日:2019-01-24

    摘要: The present invention relates to the field of analog integrated circuits, and provides a multiply-accumulate calculation method and circuit suitable for a neural network, which realizes large-scale multiply-accumulate calculation of the neural network with low power consumption and high speed. The multiply-accumulate calculation circuit comprises a multiplication calculation circuit array and an accumulation calculation circuit. The multiplication calculation circuit array is composed of M groups of multiplication calculation circuits. Each group of multiplication calculation circuits is composed of one multiplication array unit and eight selection-shift units. The order of the multiplication array unit is quantized in real time by using on-chip training to provide a shared input for the selection-shift units, achieving increased operating rate and reduced power consumption. The accumulation calculation circuit is composed of a delay accumulation circuit, a TDC conversion circuit, and a shift-addition circuit in series. The delay accumulation circuit comprises eight controllable delay chains for dynamically controlling the number of iterations and accumulating data multiple times in a time domain, so as to meet the difference in calculation scale of different network layers, save hardware storage space, reduce calculation complexity, and reduce data scheduling.

    CACHE STRUCTURE AND MANAGEMENT METHOD FOR USE IN IMPLEMENTING RECONFIGURABLE SYSTEM CONFIGURATION INFORMATION STORAGE
    5.
    发明申请
    CACHE STRUCTURE AND MANAGEMENT METHOD FOR USE IN IMPLEMENTING RECONFIGURABLE SYSTEM CONFIGURATION INFORMATION STORAGE 有权
    用于实施可重构系统配置信息存储的缓存结构和管理方法

    公开(公告)号:US20150254180A1

    公开(公告)日:2015-09-10

    申请号:US14425456

    申请日:2013-11-13

    IPC分类号: G06F12/06 G06F12/08

    摘要: Disclosed is a cache structure for use in implementing reconfigurable system configuration information storage, comprising: layered configuration information cache units: for use in caching configuration information that may be used by a certain or several reconfigurable arrays within a period of time; an off-chip memory interface module: for use in establishing communication; a configuration anagement unit: for use in managing a reconfiguration process of the reconfigurable arrays, in mapping each subtask in an algorithm application to a certain reconfigurable array, thus the reconfigurable array will, on the basis of the mapped subtask, load the corresponding configuration information to complete a function reconfiguration for the reconfigurable array. This increases the utilization efficiency of configuration information caches. Also provided is a method for managing the reconfigurable system configuration information caches, employing a mixed priority cache update method, and changing a mode for managing the configuration information caches in a conventional reconfigurable system, thus increasing the dynamic reconfiguration efficiency in a complex reconfigurable system.

    摘要翻译: 公开了一种用于实现可重构系统配置信息存储的缓存结构,包括:分层配置信息高速缓存单元:用于缓存在一段时间内由特定或多个可重配置阵列使用的配置信息; 片外存储器接口模块:用于建立通信; 配置管理单元:用于管理可重新配置阵列的重新配置过程,将算法应用中的每个子任务映射到某个可重配置阵列,因此可重构阵列将基于映射子任务加载相应的配置信息 完成可重构阵列的功能重新配置。 这增加了配置信息高速缓存的使用效率。 还提供了一种用于管理可重配置系统配置信息高速缓存的方法,采用混合优先级高速缓存更新方法,以及改变用于管理常规可重新配置系统中的配置信息高速缓存的模式,从而增加复杂可重新配置系统中的动态重新配置效率。