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公开(公告)号:US06406993B1
公开(公告)日:2002-06-18
申请号:US09523439
申请日:2000-03-10
申请人: Srikanteswara Dakshina-Murthy , Paul R. Besser , Jonathan B. Smith , Eric M. Apelgren , Christian Zistl , Jeremy I. Martin , Lie Larry Zhao , Nicholas J. Kepler
发明人: Srikanteswara Dakshina-Murthy , Paul R. Besser , Jonathan B. Smith , Eric M. Apelgren , Christian Zistl , Jeremy I. Martin , Lie Larry Zhao , Nicholas J. Kepler
IPC分类号: H01L214763
CPC分类号: H01L21/76816 , H01L21/76831
摘要: The present invention is directed to a method of forming semiconductor devices. In one illustrative embodiment, the method comprises forming a layer of dielectric material, forming a hard mask layer above the layer of dielectric material, and forming an opening in the hard mask layer. The method further comprises forming a sidewall spacer in the opening in the hard mask layer that defines a reduced opening, forming an opening in the layer of dielectric material below the reduced opening, and forming a conductive interconnection in the opening in the dielectric layer.
摘要翻译: 本发明涉及一种形成半导体器件的方法。 在一个说明性实施例中,该方法包括形成电介质材料层,在介电材料层之上形成硬掩模层,并在硬掩模层中形成开口。 所述方法还包括在所述硬掩模层中的所述开口中形成侧壁间隔物,所述开口限定缩小的开口,在所述还原开口下方的介电材料层中形成开口,以及在所述电介质层的所述开口中形成导电互连。
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2.
公开(公告)号:US07737021B1
公开(公告)日:2010-06-15
申请号:US10261613
申请日:2002-09-30
申请人: Srikanteswara Dakshina-Murthy , Paul R. Besser , Jonathan B. Smith , Eric M. Apelgren , Christian Zistl , Jeremy I. Martin , Lie Larry Zhao , Nicholas John Kepler
发明人: Srikanteswara Dakshina-Murthy , Paul R. Besser , Jonathan B. Smith , Eric M. Apelgren , Christian Zistl , Jeremy I. Martin , Lie Larry Zhao , Nicholas John Kepler
IPC分类号: H01L21/4763
CPC分类号: H01L21/76816 , H01L21/0337 , H01L21/0338 , H01L21/31144
摘要: The present invention is directed to a method of forming semiconductor devices. In one illustrative embodiment, the method comprises defining a photoresist feature having a first size in a layer of photoresist that is formed above a layer of dielectric material. The method further comprises reducing the first size of the photoresist feature to produce a reduced size photoresist feature, forming an opening in the layer of dielectric material under the reduced size photoresist feature, and forming a conductive material in the opening in the layer of dielectric material.
摘要翻译: 本发明涉及一种形成半导体器件的方法。 在一个说明性实施例中,该方法包括在形成在电介质材料层上方的光致抗蚀剂层中限定具有第一尺寸的光致抗蚀剂特征。 该方法还包括减小光致抗蚀剂特征的第一尺寸以产生减小尺寸的光致抗蚀剂特征,在减小尺寸的光致抗蚀剂特征下的电介质材料层中形成开口,以及在电介质材料层中的开口中形成导电材料 。
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3.
公开(公告)号:US06500755B2
公开(公告)日:2002-12-31
申请号:US09731577
申请日:2000-12-06
申请人: Srikanteswara Dakshina-Murthy , Paul R. Besser , Jonathan B. Smith , Eric M. Apelgren , Christian Zistl , Jeremy I. Martin , Lie Larry Zhao , Nicholas John Kepler
发明人: Srikanteswara Dakshina-Murthy , Paul R. Besser , Jonathan B. Smith , Eric M. Apelgren , Christian Zistl , Jeremy I. Martin , Lie Larry Zhao , Nicholas John Kepler
IPC分类号: H01L214763
CPC分类号: H01L21/76816 , H01L21/0337 , H01L21/0338 , H01L21/31144
摘要: The present invention is directed to a method of forming semiconductor devices. In one illustrative embodiment, the method comprises defining a photoresist feature having a first size in a layer of photoresist that is formed above a layer of dielectric material. The method further comprises reducing the first size of the photoresist feature to produce a reduced size photoresist feature, forming an opening in the layer of dielectric material under the reduced size photoresist feature, and forming a conductive material in the opening in the layer of dielectric material.
摘要翻译: 本发明涉及一种形成半导体器件的方法。 在一个说明性实施例中,该方法包括在形成在电介质材料层上方的光致抗蚀剂层中限定具有第一尺寸的光致抗蚀剂特征。 该方法还包括减小光致抗蚀剂特征的第一尺寸以产生减小尺寸的光致抗蚀剂特征,在减小尺寸的光致抗蚀剂特征下的电介质材料层中形成开口,以及在电介质材料层中的开口中形成导电材料 。
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