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1.发明申请Method of making a semiconductor device that has copper damascene interconnects with enhanced electromigration reliability 有权制造具有铜镶嵌的具有增强的电迁移可靠性的半导体器件的方法公开(公告)号：US20050095751A1
公开(公告)日：2005-05-05
申请号：US10984604
申请日：2004-11-08
申请人： Stefan Hau-Riege , R. List
发明人： Stefan Hau-Riege , R. List
IPC分类号： H01L21/768 , H01L23/532 , H01L21/44 , H01L21/48
CPC分类号： H01L21/76843 , H01L21/76801 , H01L21/76807 , H01L21/76849 , H01L21/76864 , H01L21/76886 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： A method of making a semiconductor device is described. That method comprises forming a conductive layer that contacts a via, such that the conductive layer includes a higher concentration of an electromigration retarding amount of a dopant near the via than away from the via.
摘要翻译： 描述制造半导体器件的方法。 该方法包括形成接触通孔的导电层，使得导电层在远离通孔的地方包括较高浓度的通孔附近的掺杂剂的电迁移量。
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2.发明授权公开(公告)号：US06768323B1
公开(公告)日：2004-07-27
申请号：US10283463
申请日：2002-10-30
IPC分类号： G01R3126
CPC分类号： G01R31/2853
摘要： For locating an extrusion from an interconnect, an extrusion monitor structure is formed to surround the interconnect and is separated from the interconnect by a dielectric material. A first via is coupled to the interconnect, and a second via is coupled to the extrusion monitor structure and separated from the first via by a via distance (Lv). The extrusion is located at an extrusion site distance (Lextrusion) from the first via and between the first and second vias to short-circuit the interconnect to the extrusion monitor structure. A resistance (Rtotal) between the first and second vias is measured, and the Lextrusion is determined from a relationship with Rtotal, Lv, and resistivities and dimensions of the interconnect and the extrusion monitor structure.
摘要翻译： 为了从互连件定位挤出物，形成挤出监测器结构以围绕互连并通过介电材料与互连件分离。 第一通孔耦合到互连，并且第二通孔耦合到挤出监控器结构，并且与第一通孔相隔一个通孔距离（Lv）。 挤出位于第一通孔和第一和第二通孔之间的挤出位置距离（拉挤）处，以将互连件短路到挤出监测器结构。 测量第一和第二通孔之间的电阻（Rtotal），并且根据互连和挤出监测器结构的Rtotal，Lv以及电阻率和尺寸的关系确定Lextrusion。
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公开(公告)号：US20080131316A1
公开(公告)日：2008-06-05
申请号：US11634784
申请日：2006-12-05
申请人： J. Del Eckels , Peter J. Nunes , Randall L. Simpson , Stefan Hau-Riege , Chris Walton , J. Chance Carter , John G. Reynolds
发明人： J. Del Eckels , Peter J. Nunes , Randall L. Simpson , Stefan Hau-Riege , Chris Walton , J. Chance Carter , John G. Reynolds
CPC分类号： F24V30/00
摘要： A low to moderate temperature heat source comprising a high temperature energy source modified to output low to moderate temperatures wherein the high temperature energy source modified to output low to moderate temperatures is positioned between two thin pieces to form a close contact sheath. In one embodiment the high temperature energy source modified to output low to moderate temperatures is a nanolaminate multilayer foil of reactive materials that produces a heating level of less than 200° C.
摘要翻译： 一种低至中等温度的热源，包括经修改以输出低至中等温度的高温能量源，其中修改为输出低至中等温度的高温能量源位于两个薄片之间以形成紧密接触护套。 在一个实施方案中，修改为输出低至中等温度的高温能源是产生小于200℃的加热水平的反应性材料的纳米级多层箔。
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4.发明授权Method of making a semiconductor device that has copper damascene interconnects with enhanced electromigration reliability 有权制造具有铜镶嵌的具有增强的电迁移可靠性的半导体器件的方法公开(公告)号：US07153774B2
公开(公告)日：2006-12-26
申请号：US10165679
申请日：2002-06-06
IPC分类号： H01L21/44
CPC分类号： H01L21/76849 , H01L21/76858
摘要： A method of making a semiconductor device is described. That method includes forming a copper containing layer on a substrate, and forming an alloying layer that includes an alloying element on the copper containing layer. After applying heat to cause an intermetallic layer that includes copper and the alloying element to form on the surface of the copper containing layer, a barrier layer is formed on the intermetallic layer.
摘要翻译： 描述制造半导体器件的方法。 该方法包括在基板上形成含铜层，并且在含铜层上形成包含合金元素的合金化层。 在加热之后，在含铜层的表面上形成包含铜和合金元素的金属间层，在金属间层上形成阻挡层。
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公开(公告)号：US06925216B2
公开(公告)日：2005-08-02
申请号：US10676876
申请日：2003-09-30
CPC分类号： G02B6/132 , G02B2006/12061 , G02B2006/12169 , G02B2006/12173
摘要： An optical waveguide structure is formed by embedding a core material within a medium of lower refractive index, i.e. the cladding. The optical index of refraction of amorphous silicon (a-Si) and polycrystalline silicon (p-Si), in the wavelength range between about 1.2 and about 1.6 micrometers, differ by up to about 20%, with the amorphous phase having the larger index. Spatially selective laser crystallization of amorphous silicon provides a mechanism for controlling the spatial variation of the refractive index and for surrounding the amorphous regions with crystalline material. In cases where an amorphous silicon film is interposed between layers of low refractive index, for example, a structure comprised of a SiO2 substrate, a Si film and an SiO2 film, the formation of guided wave structures is particularly simple.
摘要翻译： 通过将芯材料嵌入在较低折射率的介质（即包层）内而形成光波导结构。 在约1.2和约1.6微米之间的波长范围内的非晶硅（a-Si）和多晶硅（p-Si）的光学折射率相差高达约20％，非晶相具有较大的指数 。 非晶硅的空间选择性激光结晶提供了用于控制折射率的空间变化并且用结晶材料围绕非晶区域的机制。 在非晶硅膜介于低折射率层之间的情况下，例如，由SiO 2衬底，Si膜和SiO 2膜构成的结构 导波结构的形成特别简单。
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6.发明授权Method of making a semiconductor device that has copper damascene interconnects with enhanced electromigration reliability 失效制造具有铜镶嵌的具有增强的电迁移可靠性的半导体器件的方法公开(公告)号：US06833321B2
公开(公告)日：2004-12-21
申请号：US10001305
申请日：2001-11-30
申请人： Stefan Hau-Riege , R. Scott List
发明人： Stefan Hau-Riege , R. Scott List
IPC分类号： H01L2144
CPC分类号： H01L21/76843 , H01L21/76801 , H01L21/76807 , H01L21/76849 , H01L21/76864 , H01L21/76886 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： A method of making a semiconductor device is described. That method comprises forming a conductive layer that contacts a via, such that the conductive layer includes a higher concentration of an electromigration retarding amount of a dopant near the via than away from the via.
摘要翻译： 描述制造半导体器件的方法。 该方法包括形成接触通孔的导电层，使得导电层在远离通孔的地方包括较高浓度的通孔附近的掺杂剂的电迁移量。
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公开(公告)号：US20090116619A1
公开(公告)日：2009-05-07
申请号：US12121177
申请日：2008-05-15
CPC分类号： G01J1/429 , G01J1/04 , G01J1/0414 , G01J1/0455 , G01J1/4228 , G01N21/4788 , G21K2207/00
摘要： A system in one embodiment includes a source for directing a beam of radiation at a sample; a multilayer mirror having a face oriented at an angle of less than 90 degrees from an axis of the beam from the source, the mirror reflecting at least a portion of the radiation after the beam encounters a sample; and a pixellated detector for detecting radiation reflected by the mirror. A method in a further embodiment includes directing a beam of radiation at a sample; reflecting at least some of the radiation diffracted by the sample; not reflecting at least a majority of the radiation that is not diffracted by the sample; and detecting at least some of the reflected radiation. A method in yet another embodiment includes directing a beam of radiation at a sample; reflecting at least some of the radiation diffracted by the sample using a multilayer mirror; and detecting at least some of the reflected radiation.
摘要翻译： 一个实施例中的系统包括用于在样本处引导辐射束的源; 多层反射镜，其具有朝向与源的光束的轴线成小于90度的角度定向的面，反射镜在光束遇到样本之后反射至少一部分辐射; 以及用于检测由反射镜反射的辐射的像素化检测器。 另一实施例中的方法包括将样品的辐射束引导; 反映由样品衍射的至少一些辐射; 不反映不被样品衍射的辐射的至少大部分; 以及检测所述反射辐射中的至少一些。 另一实施例中的方法包括将样品的辐射束引导; 使用多层反射镜反射由样品衍射的至少一些辐射; 以及检测所述反射辐射中的至少一些。
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8.发明授权Structure, system, and method for assessing electromigration permeability of layer material within interconnect 失效用于评估互连中层材料的电迁移渗透性的结构，系统和方法公开(公告)号：US06762597B1
公开(公告)日：2004-07-13
申请号：US10283625
申请日：2002-10-30
IPC分类号： G01R3126
CPC分类号： H01L23/5226 , G01R31/2853 , G01R31/2858 , H01L22/32 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： For determining electromigration permeability of a layer material, a test line, a feeder line, and a cathode line of an interconnect test structure are formed with current flowing from the test line through the feeder line to the cathode line. A no-flux structure is disposed between the cathode line and the feeder line, and the layer material is disposed between the feeder line and the test line. A respective current density and length product of the feeder line and the test line is respectively less than and greater than a respective critical Blech length constant. An occurrence of a void within the feeder line or the test line indicates that the layer material is permeable or impermeable.
摘要翻译： 为了确定层材料的电迁移渗透性，形成互连测试结构的测试线，馈线和阴极线，电流从测试线通过馈线线路流到阴极线。 在阴极线和馈电线之间设置无焊剂结构，并且层材料设置在馈电线和测试线之间。 馈电线和测试线的相应电流密度和长度乘积分别小于和大于相应的临界Blech长度常数。 供料线或试验线内的空隙出现表明层材料是可渗透的或不可渗透的。
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公开(公告)号：US06667225B2
公开(公告)日：2003-12-23
申请号：US10015618
申请日：2001-12-17
IPC分类号： H01L21301
CPC分类号： H01L25/50 , H01L2224/05001 , H01L2224/16
摘要： A method is provided for forming a wafer stack. This may include providing a first wafer having a first plurality of metalized trenches on a surface of the first wafer. A second wafer may be provided having a second plurality of metalized trenches on a surface of the second wafer facing the first wafer. The first plurality of metalized trenches may be solder bonded to the second plurality of metalized trenches.
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公开(公告)号：US07300871B2
公开(公告)日：2007-11-27
申请号：US10984604
申请日：2004-11-08
申请人： Stefan Hau-Riege , R. Scott List
发明人： Stefan Hau-Riege , R. Scott List
IPC分类号： H01L21/44
CPC分类号： H01L21/76843 , H01L21/76801 , H01L21/76807 , H01L21/76849 , H01L21/76864 , H01L21/76886 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： A method of making a semiconductor device is described. That method comprises forming a conductive layer that contacts a via, such that the conductive layer includes a higher concentration of an electromigration retarding amount of a dopant near the via than away from the via.
摘要翻译： 描述制造半导体器件的方法。 该方法包括形成接触通孔的导电层，使得导电层在远离通孔的地方包括较高浓度的通孔附近的掺杂剂的电迁移量。
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