Error correction circuit and method
    1.
    发明申请
    Error correction circuit and method 审中-公开
    纠错电路及方法

    公开(公告)号:US20060195774A1

    公开(公告)日:2006-08-31

    申请号:US11059899

    申请日:2005-02-17

    IPC分类号: G06F11/00 H03M13/00

    CPC分类号: G06F11/1032

    摘要: The present invention includes an error correction circuit with a data memory, a write tree, a parity memory, and a read tree. The data memory is configured to hold a set of data. The write tree is configured to receive the set of data and to generate parity data. The parity memory is coupled to the write tree and is configured to receive and hold parity data. The read tree is configured to receive data from the data memory and parity data from the parity memory. The read tree is configured to generate an indication of whether an error has occurred in the data during storage within the data memory.

    摘要翻译: 本发明包括具有数据存储器,写树,奇偶校验存储器和读取树的纠错电路。 数据存储器被配置为保存一组数据。 写树被配置为接收该组数据并生成奇偶校验数据。 奇偶校验存储器耦合到写树,并被配置为接收和保持奇偶校验数据。 读取树被配置为从数据存储器接收数据和来自奇偶校验存储器的奇偶校验数据。 读取树被配置为产生在数据存储器内存储期间数据中是否发生错误的指示。

    Method and apparatus for using a variable page length in a memory
    2.
    发明授权
    Method and apparatus for using a variable page length in a memory 有权
    在存储器中使用可变页长度的方法和装置

    公开(公告)号:US08060705B2

    公开(公告)日:2011-11-15

    申请号:US11957307

    申请日:2007-12-14

    申请人: Stephen Bowyer

    发明人: Stephen Bowyer

    IPC分类号: G06F13/00

    摘要: A controller, a memory device including a memory array, and a method for accessing the memory device. The method includes, during a first access, activating a first page of the memory array corresponding to a first row address and accessing data from the first page with a first column address. The method further includes, during a second access, activating a first sub-page of the memory array corresponding to a second row address and accessing data from the first sub-page with a second column address. The activated first sub-page of the memory array is smaller than the first page of the memory array. The method further includes activating a second sub-page without receiving a separate activate command.

    摘要翻译: 控制器,包括存储器阵列的存储器件以及用于访问存储器件的方法。 该方法包括在第一次访问期间,激活对应于第一行地址的存储器阵列的第一页面并且利用第一列地址访问来自第一页面的数据。 该方法还包括:在第二次访问期间,激活对应于第二行地址的存储器阵列的第一子页面并且利用第二列地址访问来自第一子页面的数据。 存储器阵列的激活的第一子页面小于存储器阵列的第一页。 该方法还包括在不接收单独的激活命令的情况下激活第二子页面。

    Method and apparatus for reducing standby current in a dynamic random access memory during self refresh
    3.
    发明授权
    Method and apparatus for reducing standby current in a dynamic random access memory during self refresh 失效
    用于在自刷新期间减少动态随机存取存储器中的待机电流的方法和装置

    公开(公告)号:US07366047B2

    公开(公告)日:2008-04-29

    申请号:US11270178

    申请日:2005-11-09

    IPC分类号: G11C7/00

    摘要: A dynamic random access memory including a first dynamic random access memory cell, a second dynamic random access memory cell to be refreshed, a sense amplifier, and a control circuit. The control circuit is configured to isolate the sense amplifier from at least one of the first dynamic random access memory cell and the second dynamic random access memory cell in an idle state and to couple the sense amplifier to only the second dynamic random access memory cell to be refreshed in a refresh state.

    摘要翻译: 包括第一动态随机存取存储单元,要刷新的第二动态随机存取存储单元,读出放大器和控制电路的动态随机存取存储器。 控制电路被配置为将感测放大器与处于空闲状态的第一动态随机存取存储器单元和第二动态随机存取存储器单元中的至少一个隔离,并将读出放大器耦合到仅第二动态随机存取存储器单元 刷新状态。

    Method and apparatus for reducing standby current in a dynamic random access memory during self refresh
    4.
    发明申请
    Method and apparatus for reducing standby current in a dynamic random access memory during self refresh 失效
    用于在自刷新期间减少动态随机存取存储器中的待机电流的方法和装置

    公开(公告)号:US20070104005A1

    公开(公告)日:2007-05-10

    申请号:US11270178

    申请日:2005-11-09

    IPC分类号: G11C7/00 G11C7/02

    摘要: A dynamic random access memory including a first dynamic random access memory cell, a second dynamic random access memory cell to be refreshed, a sense amplifier, and a control circuit. The control circuit is configured to isolate the sense amplifier from at least one of the first dynamic random access memory cell and the second dynamic random access memory cell in an idle state and to couple the sense amplifier to only the second dynamic random access memory cell to be refreshed in a refresh state.

    摘要翻译: 包括第一动态随机存取存储单元,要刷新的第二动态随机存取存储单元,读出放大器和控制电路的动态随机存取存储器。 控制电路被配置为将感测放大器与处于空闲状态的第一动态随机存取存储器单元和第二动态随机存取存储器单元中的至少一个隔离,并将读出放大器耦合到仅第二动态随机存取存储器单元 刷新状态。

    Oscillator with temperature control
    5.
    发明授权
    Oscillator with temperature control 有权
    振荡器带温度控制

    公开(公告)号:US07123105B2

    公开(公告)日:2006-10-17

    申请号:US10739398

    申请日:2003-12-19

    IPC分类号: H03K3/02

    CPC分类号: H03L1/022 H03L1/028

    摘要: An oscillator circuit includes a capacitor device, a current source for supplying a current to the capacitor device, a reference voltage, and a control circuit. The reference voltage is a first input to a comparator. An output of the capacitor device and an output of the current source are a second input to the comparator. The control circuit resets the oscillator circuit when the first and second inputs to the comparator are equal.

    摘要翻译: 振荡器电路包括电容器装置,用于向电容器装置提供电流的电流源,参考电压和控制电路。 参考电压是比较器的第一个输入。 电容器装置的输出和电流源的输出是比较器的第二输入。 当比较器的第一和第二输入相等时,控制电路复位振荡器电路。

    Barbecue grill smoker
    6.
    发明授权

    公开(公告)号:US10440968B2

    公开(公告)日:2019-10-15

    申请号:US14325725

    申请日:2014-07-08

    申请人: Stephen Bowyer

    发明人: Stephen Bowyer

    IPC分类号: A23B4/052 A47J37/07

    摘要: A barbecue grill smoker assembly includes a firebox base and fuel grate handles and food grate handles connected to components internal to a cooking chamber of the grill smoker that extend outwardly beyond the cooking chamber. The grill smoker assembly includes a fuel grate assembly in the form of a basket that, when combined with a food grate assembly, contains solid fuel within an area defined by a compartment. Fuel can be managed by manipulating the food grate assembly and the fuel grate assembly. The fuel grate assembly may include an aperture to facilitate transfer of residual solid fuel to a charcoal starting device. The lid features a lid support to support the lid when inverted.

    BARBECUE GRILL SMOKER
    7.
    发明申请

    公开(公告)号:US20160007622A1

    公开(公告)日:2016-01-14

    申请号:US14325725

    申请日:2014-07-08

    申请人: Stephen Bowyer

    发明人: Stephen Bowyer

    IPC分类号: A23B4/052

    摘要: A barbecue grill smoker assembly (10) is disclosed including fuel grate handles (21) and food grate handles (31) connected to components internal to the cooking chamber of the grill smoker defined by the firebox base (11) but extending outward beyond the cooking chamber in order to allow for manipulation of the components within the grill smoker using clean and cool handles. The grill smoker assembly also includes a fuel grate assembly (30) in the form of a basket that, when combined with the food grate assembly (20), the solid fuel is contained within the area defined by the grate. This enables the fuel to be managed by manipulating the food grate assembly (20) and fuel grate assembly (30). The fuel grate assembly (30) may also include an aperture to facilitate transfer of residual solid fuel to a charcoal starting device. Finally, the lid (12) features lid supports (14) which are used to support the lid when inverted allowing the lid to be stored without soiling the table during the lighting of the grill smoker, cooking on the grill smoker and for storage of the internal parts during grill smoker cleaning.

    摘要翻译: 公开了一种烧烤架吸烟器组件(10),其包括连接到由火炉底座(11)限定的烤架吸烟者的烹饪室内部的部件的燃料炉排把手(21)和食物篦柄(31) 以便允许使用干净和凉爽的手柄操纵烤架吸烟者内的部件。 格栅吸烟组件还包括篮状形式的燃料炉排组件(30),当与所述食物炉排组件(20)组合时,所述固体燃料被包含在由所述炉排定义的区域内。 这使燃料可以通过操纵食物炉排组件(20)和燃料炉排组件(30)来管理。 燃料炉排组件(30)还可以包括孔,以便于将残余固体燃料转移到木炭启动装置。 最后,盖(12)具有盖支撑件(14),盖支撑件(14)用于在倒置时支撑盖子,允许盖子在格栅吸烟者点燃期间不会弄脏桌子,在格栅吸烟者上烹饪并储存 内部零件烤架吸烟者清洁。

    METHOD AND APPARATUS FOR USING A VARIABLE PAGE LENGTH IN A MEMORY
    8.
    发明申请
    METHOD AND APPARATUS FOR USING A VARIABLE PAGE LENGTH IN A MEMORY 有权
    在存储器中使用可变页长度的方法和装置

    公开(公告)号:US20090157983A1

    公开(公告)日:2009-06-18

    申请号:US11957307

    申请日:2007-12-14

    申请人: Stephen Bowyer

    发明人: Stephen Bowyer

    IPC分类号: G06F12/00 G06F12/10

    摘要: A controller, a memory device including a memory array, and a method for accessing the memory device. The method includes, during a first access, activating a first page of the memory array corresponding to a first row address and accessing data from the first page with a first column address. The method further includes, during a second access, activating a first sub-page of the memory array corresponding to a second row address and accessing data from the first sub-page with a second column address. The activated first sub-page of the memory array is smaller than the first page of the memory array. The method further includes activating a second sub-page without receiving a separate activate command.

    摘要翻译: 控制器,包括存储器阵列的存储器件以及用于访问存储器件的方法。 该方法包括在第一次访问期间,激活对应于第一行地址的存储器阵列的第一页面并且利用第一列地址访问来自第一页面的数据。 该方法还包括:在第二次访问期间,激活对应于第二行地址的存储器阵列的第一子页面并且利用第二列地址访问来自第一子页面的数据。 存储器阵列的激活的第一子页面小于存储器阵列的第一页。 该方法还包括在不接收单独的激活命令的情况下激活第二子页面。

    Bank address mapping according to bank retention time in dynamic random access memories
    10.
    发明授权
    Bank address mapping according to bank retention time in dynamic random access memories 失效
    银行地址映射根据银行保留时间在动态随机存取存储器中

    公开(公告)号:US06920523B2

    公开(公告)日:2005-07-19

    申请号:US10265964

    申请日:2002-10-07

    摘要: A system and method for refreshing data in a dynamic random access memory (“DRAM”) is provided, where the system includes a data memory having a plurality of memory banks, a map memory in signal communication with the data memory for translating an internal address of each of the plurality of memory banks into a corresponding external address, a map comparator in signal communication with the map memory for selectively enabling a memory bank in accordance with its external address, a refresh address generator in signal communication with the map comparator for selectively refreshing the enabled memory bank in accordance with its external address, and a refresh counter in signal communication with the refresh address generator for signaling a refresh in accordance with the maximum required refresh time of the enabled memory bank; and where the corresponding method includes determining the maximum required refresh period for each of the memory banks, respectively, prioritizing the memory banks in accordance with their respective refresh periods, utilizing the memory banks in order of their respective prioritizations, selectively disabling at least one of the memory banks in reverse-order of their respective prioritizations, and refreshing only the remaining non-disabled memory banks.

    摘要翻译: 提供了一种用于在动态随机存取存储器(“DRAM”)中刷新数据的系统和方法,其中系统包括具有多个存储体的数据存储器,与数据存储器进行信号通信的地图存储器,用于翻译内部地址 多个存储体中的每一个存储为相应的外部地址;映射比较器,与地图存储器进行信号通信,用于根据其外部地址选择性地使能存储体;与地图比较器进行信号通信的刷新地址生成器, 根据其外部地址刷新启用的存储体,以及与刷新地址生成器进行信号通信的刷新计数器,用于根据所启用的存储体的最大所需刷新时间来发信号通知刷新; 并且其中相应的方法包括分别确定每个存储体的最大所需刷新周期,根据它们各自的刷新周期对存储体进行优先排序,按照它们各自的优先次序按顺序利用存储体,选择性地禁用 存储器组以其各自的优先级的相反顺序,并仅刷新剩余的非残留存储体。