公开(公告)号：US06934802B2

公开(公告)日：2005-08-23

申请号：US10345476

申请日：2003-01-15

申请人： Stephen R. Cornaby ,  Travis D. Fox ,  Edwin S. Olds

发明人： Stephen R. Cornaby ,  Travis D. Fox ,  Edwin S. Olds

IPC分类号： G06F12/08 ,  G06F12/12

CPC分类号： G06F12/0862 ,  G06F12/0866 ,  G06F12/122 ,  G06F12/123 ,  G06F2212/312

摘要： A data storage device with a cache memory in communication with a control processor programmed with a routine to effect data throughput with a host device. The data storage device includes a head-disc assembly responsive to the control processor retrieving a host data along with a speculative data in a form of a read data. The control processor adjusting a range for acquisition of the speculative data based on data stored in cache memory fragments of the cache memory. The cache memory storing the read data in an unused cache memory fragment, while the control processor updates a history queue and a band count table based on the acquired read data and releases an oldest cache memory fragment with a lowest count value in the band count table from the cache memory in response to a need for cache memory space.

摘要翻译： 一种数据存储设备，其具有与用例程一起编程的控制处理器通信的高速缓冲存储器，以利用主机设备来实现数据吞吐量。 数据存储设备包括头盘组件，其响应于控制处理器以读取数据的形式检索主机数据以及推测数据。 控制处理器基于存储在高速缓冲存储器的高速缓存存储器片段中的数据来调整用于获取推测数据的范围。 高速缓存存储器将读取的数据存储在未使用的高速缓冲存储器片段中，而控制处理器基于所获取的读取数据更新历史队列和频带计数表，并且在频带计数表中释放具有最低计数值的最旧的高速缓存存储器片段 从高速缓冲存储器响应需要缓存的内存空间。

公开(公告)号：US06654850B2

公开(公告)日：2003-11-25

申请号：US09966461

申请日：2001-09-28

申请人： Travis D. Fox ,  Stephen R. Cornaby

发明人： Travis D. Fox ,  Stephen R. Cornaby

IPC分类号： G06F1200

CPC分类号： G06F3/0653 ,  G06F3/0613 ,  G06F3/0634 ,  G06F3/064 ,  G06F3/0674 ,  G06F11/348 ,  G06F11/3485 ,  G06F12/0804 ,  G06F12/0866 ,  G06F19/00

摘要： Method and apparatus for improving data transfer rate performance of a disc drive configured to store data from a host device in physical data blocks identified by the host device in terms of logical block addresses (LBAs). A sequence of input/output (I/O) commands is provided to the disc drive each directing the transfer of data between at least one LBA within the disc drive and the host device. The correlation between the time sequence of the I/O commands to the locations of the physical data blocks corresponding to the LBAs accessed by the I/O commands is obtained, and preferably displayed graphically in a three-dimensional histogram showing physical data block accesses by time and by frequency. At least one data transfer parameter of the disc drive is thereafter adjusted in relation to the physical operations of the drive in response to the I/O command sequence.

公开(公告)号：US06393492B1

公开(公告)日：2002-05-21

申请号：US08553024

申请日：1995-11-03

申请人： Stephen R. Cornaby ,  Tracy D. Harmer

发明人： Stephen R. Cornaby ,  Tracy D. Harmer

IPC分类号： G06F1310

CPC分类号： G06F11/0727 ,  G06F3/0601 ,  G06F9/4411 ,  G06F11/0766 ,  G06F2003/0697

摘要： An arrangement and method are disclosed herein for operating a mass memory storage peripheral computer device connected to a host computer. The host computer has system RAM associated with the host computer and is operated using an operating system and a system BIOS. The mass memory storage peripheral computer device is connected to the host computer using a peripheral bus in which relocatable expansion BIOS location addresses are allowed. The arrangement and method include a loadable device driver for controlling the operation of the mass memory storage peripheral computer device during the operation of the computer system. During the start-up of the computer system, the loadable device driver is loaded into the system RAM for use during the operation of the system. The loadable device driver allows the host computer to communicate with and control the operation of the mass memory storage peripheral computer device in a way which does not require the system BIOS or any other type of protocol translation mechanism to be provided between the loadable device driver and the operating system or the mass memory storage peripheral computer device in order for the loadable device driver to communicate with the operating system and the mass memory storage peripheral computer device.

摘要翻译： 本文公开了用于操作连接到主计算机的大容量存储器存储外围计算机设备的布置和方法。 主计算机具有与主机相关联的系统RAM，并使用操作系统和系统BIOS进行操作。 大容量存储器外围计算机设备使用允许可重定位扩展BIOS位置地址的外围总线连接到主计算机。 该装置和方法包括用于在计算机系统的操作期间控制大容量存储器外围计算机设备的操作的可加载设备驱动器。 在计算机系统启动期间，可加载设备驱动程序被加载到系统RAM中，以便在系统的操作期间使用。 可加载设备驱动器允许主计算机以不需要系统BIOS或任何其他类型的协议转换机制的方式与大容量存储器存储外围设备设备的操作进行通信并控制其在可加载设备驱动器和 操作系统或大容量存储器存储外围计算机设备，以便可加载设备驱动程序与操作系统和大容量存储器存储外围计算机设备进行通信。

公开(公告)号：US5410722A

公开(公告)日：1995-04-25

申请号：US7199

申请日：1993-01-21

申请人： Stephen R. Cornaby

发明人： Stephen R. Cornaby

IPC分类号： G06F9/46 ,  G06F5/06 ,  G06F7/78 ,  G06F7/16 ,  G06F12/02 ,  G06F12/06 ,  G06F12/08

CPC分类号： G06F7/78 ,  G06F5/06 ,  G06F2205/064

摘要： A plurality of queues where each queue is defined by a set of criteria, the queue system comprises a plurality of header registers where each header register defines a queue in the queue system and a plurality of task registers where each task register can be associated with each queue in the queue system. Each header register has a unique address and contains a previous field and a next field. Each task register has a unique address and contains a previous field and a next field. Each previous field and said next field stores the address of another register in a given queue such that each queue is formed in a double link structure. Control means is provided for dynamically assigning task registers to queues by controlling the addresses stored in the previous and next fields in each header and task registers such that each of said task registers is always assigned to a queue in the queue system.

摘要翻译： 多个队列，其中每个队列由一组标准定义，队列系统包括多个头部寄存器，其中每个头部寄存器定义队列系统中的队列，以及多个任务寄存器，其中每个任务寄存器可以与每个队列相关联 在队列系统中排队。 每个标头寄存器都有一个唯一的地址，并包含一个前一个字段和一个下一个字段。 每个任务寄存器都有一个唯一的地址，并包含一个前一个字段和一个下一个字段。 每个先前字段和所述下一字段将给定队列中的另一寄存器的地址存储，使得每个队列形成为双链路结构。 提供控制装置，用于通过控制存储在每个头部和任务寄存器中的前一个和下一个字段中的地址来将任务寄存器动态地分配给队列，使得每个所述任务寄存器总是被分配给队列系统中的队列。

公开(公告)号：US5355486A

公开(公告)日：1994-10-11

申请号：US6457

申请日：1993-01-21

申请人： Stephen R. Cornaby

发明人： Stephen R. Cornaby

IPC分类号： G06F3/06 ,  G11B5/54 ,  G11B5/596 ,  G11B19/02 ,  G11B21/00 ,  G11B21/08

CPC分类号： G11B21/083 ,  G11B19/02 ,  G11B21/00 ,  G11B5/5578

摘要： A task assigning system within a dual actuator disk drive system wherein each task has a cylinder address comprising a plurality of registers, each register having a unique address and a plurality of fields for storing a task including the cylinder address associated with the tasks, a queue comprising a header register, the header register having a plurality of fields, an insertion means for inserting and ordering the registers into the queue when a task is first stored into the register, a first means for assigning tasks stored in the queue to a first actuator of the dual actuators in the sequence of increasing value of the cylinder addresses of tasks stored in the registers in the queue and a second means for assigning tasks stored in the queue to a second actuator of the dual actuators in the sequence of decreasing values of the cylinder addresses of the tasks stored in the registers in the queue.

摘要翻译： 双执行器盘驱动器系统中的任务分配系统，其中每个任务具有包括多个寄存器的圆柱地址，每个寄存器具有唯一地址和多个字段，用于存储包括与任务相关联的圆柱体地址的任务，队列 包括头部寄存器，所述头部寄存器具有多个字段;插入装置，用于当任务首先存储到所述寄存器中时将所述寄存器插入并排序到所述队列中;第一装置，用于将存储在所述队列中的任务分配给第一致动器 按照序列中存储在队列中的寄存器中的任务的气缸地址值增加的顺序的双重致动器;以及第二装置，用于将存储在队列中的任务分配给双重致动器的第二致动器， 存储在队列中的寄存器中的任务的圆柱地址。

公开(公告)号：US06996668B2

公开(公告)日：2006-02-07

申请号：US10185063

申请日：2002-06-28

申请人： Mark A. Gaertner ,  Luke W. Friendshuh ,  Stephen R. Cornaby

发明人： Mark A. Gaertner ,  Luke W. Friendshuh ,  Stephen R. Cornaby

IPC分类号： G06F12/02

CPC分类号： G06F12/0804 ,  G06F11/2066 ,  G06F11/2074 ,  G06F11/2084 ,  G06F11/2087 ,  G06F12/0866

摘要： A data storage device mirrors data on a data storage medium. The multiple instances of data are synchronized in order to optimize performance of the reading and writing, and the integrity of the data. Preferably, a data storage device is allowed to defer writing multiple copies of data until a more advantageous time.

公开(公告)号：US06286057B1

公开(公告)日：2001-09-04

申请号：US09458476

申请日：1999-12-09

申请人： Stephen R. Cornaby ,  Tracy D. Harmer

发明人： Stephen R. Cornaby ,  Tracy D. Harmer

IPC分类号： G06F1200

CPC分类号： G06F3/0626 ,  G06F3/061 ,  G06F3/0658 ,  G06F3/0659 ,  G06F3/0674 ,  G06F3/0676

摘要： A computer controlled system includes a data storage device connected to a host computer using a bus which allows device-initiated bus-mastering. The system has system RAM which is associated with the host computer and which is not part of the data storage device. The data storage device requires certain device operating data/code in the form of device control means and device operating data to be used to control the operation of the device. An arrangement and method for operating the data storage device includes storing at least a portion of the device operating data/code in the system RAM. The arrangement and method further include allowing the host computer and/or the data storage device access to the device operating data/code stored in the system RAM such that the host computer and/or the data storage device may use the device operating data/code to control the operation of the data storage device.

摘要翻译： 计算机控制系统包括使用允许设备发起的总线主控的总线连接到主计算机的数据存储设备。 该系统具有与主计算机相关联的系统RAM，并且不是数据存储设备的一部分。 数据存储设备需要设备控制装置和设备操作数据形式的某些设备操作数据/代码来用于控制设备的操作。 用于操作数据存储设备的布置和方法包括将设备中的操作数据/代码的至少一部分存储在系统RAM中。 该装置和方法还包括允许主计算机和/或数据存储设备访问存储在系统RAM中的设备操作数据/代码，使得主计算机和/或数据存储设备可以使用设备操作数据/代码 以控制数据存储设备的操作。

公开(公告)号：US5408501A

公开(公告)日：1995-04-18

申请号：US43444

申请日：1993-04-06

申请人： Stephen R. Cornaby

发明人： Stephen R. Cornaby

IPC分类号： H04L29/00 ,  H04L25/38 ,  H04L25/40 ,  H04K1/10 ,  H04K27/28

CPC分类号： H04L25/40

摘要： A serial data transmission system employing at least three transmission lines for transmitting the serial data. Each of the transmission lines can be designated as a data line 1 or as a data line 2. An encoder dynamically designates, for each binary data bit transmission period, one transmission line as data line 1 and one transmission line as data line 2 such that the transitions representing two data bits being transmitted in two successive transmission periods not occur on any one of the transmission lines. In each binary data bit transmission period, the encoder will cause a transition to occur on either data line 1 or data line 2 as a function of the value of the data bit to be transmitted during that transmission period. A decoder retrieves the data bit for each transmission period in accordance with whether the transition occurred on the transmission line designated as data line 1 or the transmission line designated as data line 2 for that period and determines for the next transmission period which of the transmission lines will be designated as the data line 1 and which of the transmission lines will be designated as the data line 2.

摘要翻译： 串行数据传输系统，采用至少三条传输线传输串行数据。 每个传输线可以被指定为数据线1或数据线2.编码器为每个二进制数据位传输周期动态地指定一条传输线作为数据线1和一条传输线作为数据线2，使得 在两个连续的传输周期中发送表示两个数据位的转换不会出现在任何一个传输线上。 在每个二进制数据位传输周期中，编码器将导致在数据线1或数据线2上发生转变，作为在该传输周期期间要发送的数据位的值的函数。 解码器根据在该周期中指定为数据线1的传输线或被指定为数据线2的传输线是否发生转换，检索每个传输周期的数据位，并确定下一传输周期哪一个传输线 将被指定为数据线1，哪些传输线将被指定为数据线2。

公开(公告)号：US08327093B2

公开(公告)日：2012-12-04

申请号：US10970424

申请日：2004-10-21

申请人： Edwin Scott Olds ,  Stephen R. Cornaby ,  Mark David Hertz ,  Kenny Troy Coker

发明人： Edwin Scott Olds ,  Stephen R. Cornaby ,  Mark David Hertz ,  Kenny Troy Coker

IPC分类号： G06F12/00

CPC分类号： G06F3/0601 ,  G06F2003/0697 ,  G11B5/012 ,  G11B5/5547 ,  G11B19/02

摘要： A unique system and method for ordering commands may reduce disc access latency while giving preference to pending commands. The method and system involves giving preference to pending commands in a set of priority queues. The method and system involve identifying a pending command and processing other non-pending commands in route to the pending command if performance will not be penalized in doing so. The method and system include a list of command node references referring to a list of sorted command nodes that are to be scheduled for processing.

摘要翻译： 用于排序命令的唯一系统和方法可以减少光盘访问延迟，同时优先考虑挂起的命令。 该方法和系统涉及给予一组优先级队列中的待命命令的优先权。 该方法和系统包括识别挂起的命令并处理到待处理命令的路由中的其他非挂起命令，如果在执行此操作时不执行性能的话。 该方法和系统包括参考将被调度以进行处理的排序的命令节点的列表的命令节点引用的列表。

公开(公告)号：US06826630B2

公开(公告)日：2004-11-30

申请号：US10121901

申请日：2002-04-12

申请人： Edwin Scott Olds ,  Stephen R. Cornaby ,  Mark David Hertz ,  Kenny Troy Coker

发明人： Edwin Scott Olds ,  Stephen R. Cornaby ,  Mark David Hertz ,  Kenny Troy Coker

IPC分类号： G06F1300

CPC分类号： G06F3/0601 ,  G06F2003/0697 ,  G11B5/012 ,  G11B5/5547 ,  G11B19/02

摘要： A unique system and method for ordering commands to reduce disc access latency while giving preference to pending commands. The method and system involves giving preference to pending commands in a set of priority queues. The method and system involve identifying a pending command and processing other non-pending commands in route to the pending command if performance will not be penalized in doing so. The method and system include a list of command node references referring to a list of sorted command nodes that are to be scheduled for processing.

摘要翻译： 一种唯一的系统和方法，用于排序命令以减少光盘访问延迟，同时优先考虑挂起的命令。 该方法和系统涉及给予一组优先级队列中的待命命令的优先权。 该方法和系统包括识别挂起的命令并处理到待处理命令的路由中的其他非挂起命令，如果在执行此操作时不执行性能的话。 该方法和系统包括参考将被调度以进行处理的排序的命令节点的列表的命令节点引用的列表。