公开(公告)号：US20100036460A1

公开(公告)日：2010-02-11

申请号：US12536562

申请日：2009-08-06

申请人： Sthanunathan Ramakrishnan ,  Jawaharlal Tangudu ,  Visvesvaraya Pentakota

发明人： Sthanunathan Ramakrishnan ,  Jawaharlal Tangudu ,  Visvesvaraya Pentakota

IPC分类号： A61N1/08 ,  H04B1/16

CPC分类号： A61N1/3727

摘要： Parallel search circuit for a medical implant receiver. The circuit includes a radio frequency receiver that receives a first set of contents of a band of channels. The circuit also includes a processing circuit coupled to the radio frequency receiver to process in parallel a second set of contents of a plurality of channels of the band of channels and to detect a signal in the band of channels.

摘要翻译： 用于医疗植入物接收器的并行搜索电路。 该电路包括接收频道频带的第一组内容的射频接收机。 电路还包括耦合到射频接收机的处理电路并行处理频道频带的多个信道的第二组内容并且检测频道频带中的信号。

公开(公告)号：US08345811B2

公开(公告)日：2013-01-01

申请号：US12060886

申请日：2008-04-02

申请人： Sarma S. Gunturi ,  Jawaharlal Tangudu ,  Sthanunathan Ramakrishnan ,  Jayawardan Janardhanan ,  Debapriya Sahu ,  Subhashish Mukherjee

发明人： Sarma S. Gunturi ,  Jawaharlal Tangudu ,  Sthanunathan Ramakrishnan ,  Jayawardan Janardhanan ,  Debapriya Sahu ,  Subhashish Mukherjee

IPC分类号： H04L7/00

CPC分类号： H04L27/362 ,  H04L7/0331

摘要： A method of achieving reduced modulation range requirement in a Digitally Controlled Oscillator (DCO) which is deployed as part of a DRP (Digital Radio Processor) and tuned to a tuning frequency range having operating-channel center-frequencies, wherein phase difference between consecutive samples is termed as FCW (Frequency Control Word), uses the steps of digitally modifying and limiting the FCW so that the FCW does not exceed known FCW thresholds, e.g., chosen from π/2, π/4, π/8, and redistributing the FCWs while maintaining a cumulative sum of phases and without significant EVM (Error Vector Magnitude) degradation. The FCW threshold can be chosen arbitrarily and need not be in the form of π/2n. The method uses a FCW limiting algorithm which reduces supply voltage sensitivity of the DCO and enables significant reduction in area of capacitor bank which would be otherwise needed.

摘要翻译： 一种在数字控制振荡器（DCO）中实现减少的调制范围要求的方法，其被部署为DRP（数字无线电处理器）的一部分并被调谐到具有操作信道中心频率的调谐频率范围，其中连续样本之间的相位差 被称为FCW（频率控制字），使用数字修改和限制FCW的步骤，使得FCW不超过已知的FCW阈值，例如从＆pgr; / 2，＆pgr; / 4，＆pgr / 并重新分配FCW，同时保持相位的累积和，并且没有显着的EVM（误差向量幅度）劣化。 FCW阈值可以任​​意选择，不需要以＆pgr / 2n的形式。 该方法使用FCW限制算法，其降低DCO的电源电压灵敏度，并且能够显着减小电容器组的面积，否则将需要它。

公开(公告)号：US20110051639A1

公开(公告)日：2011-03-03

申请号：US12546867

申请日：2009-08-25

申请人： Sthanunathan Ramakrishnan ,  Bijoy Bhukania ,  Jawaharlal Tangudu ,  Sarma S. Gunturi ,  Jaiganesh Balakrishnan ,  Rakesh Kumar ,  Abhijit Kumar Das ,  Yogesh Darwhekar

发明人： Sthanunathan Ramakrishnan ,  Bijoy Bhukania ,  Jawaharlal Tangudu ,  Sarma S. Gunturi ,  Jaiganesh Balakrishnan ,  Rakesh Kumar ,  Abhijit Kumar Das ,  Yogesh Darwhekar

IPC分类号： G08C17/02 ,  H04L27/00

CPC分类号： H04L12/12 ,  H04W24/00 ,  H04W28/18 ,  H04W52/028 ,  H04W84/12 ,  H04W84/18 ,  H04W88/02 ,  Y02D70/142 ,  Y02D70/144 ,  Y02D70/162 ,  Y02D70/23

摘要： A receiver in a packet based communication system includes a programmable block and a detection block that detects at least one of an operating condition of the receiver and a protocol condition of the communication system. Further, the receiver includes a control circuit coupled to the programmable block that controls the programmable block to transition to a set of radio modes according to at least one of the operating condition and the protocol condition.

摘要翻译： 基于分组的通信系统中的接收机包括可编程块和检测接收机的操作条件和通信系统的协议状态中的至少一个的检测块。 此外，接收机包括耦合到可编程块的控制电路，其根据操作条件和协议条件中的至少一个控制可编程块向一组无线电模式转变。

公开(公告)号：US20090252269A1

公开(公告)日：2009-10-08

申请号：US12060886

申请日：2008-04-02

申请人： Sarma S. Gunturi ,  Jawaharlal Tangudu ,  Sthanunathan Ramakrishnan ,  Jayawardan Janardhanan ,  Debapriya Sahu ,  Subhashish Mukherjee

发明人： Sarma S. Gunturi ,  Jawaharlal Tangudu ,  Sthanunathan Ramakrishnan ,  Jayawardan Janardhanan ,  Debapriya Sahu ,  Subhashish Mukherjee

IPC分类号： H04L7/00

CPC分类号： H04L27/362 ,  H04L7/0331

摘要： A method of achieving reduced modulation range requirement in a Digitally Controlled Oscillator (DCO) which is deployed as part of a DRP (Digital Radio Processor) and tuned to a tuning frequency range having operating-channel center-frequencies, wherein phase difference between consecutive samples is termed as FCW (Frequency Control Word), uses the steps of digitally modifying and limiting the FCW so that the FCW does not exceed known FCW thresholds, e.g., chosen from π/2, π/4, π/8, and redistributing the FCWs while maintaining a cumulative sum of phases and without significant EVM (Error Vector Magnitude) degradation. The FCW threshold can be chosen arbitrarily and need not be in the form of π/2n. The method uses a FCW limiting algorithm which reduces supply voltage sensitivity of the DCO and enables significant reduction in area of capacitor bank which would be otherwise needed.

摘要翻译： 一种在数字控制振荡器（DCO）中实现减少的调制范围要求的方法，其被部署为DRP（数字无线电处理器）的一部分并被调谐到具有操作信道中心频率的调谐频率范围，其中连续样本之间的相位差 被称为FCW（频率控制字），使用数字修改和限制FCW的步骤，使得FCW不超过已知的FCW阈值，例如从pi / 2，pi / 4，pi / 8选择并重新分配 FCW同时保持相位的累积和，并且没有显着的EVM（误差矢量幅度）劣化。 FCW阈值可以任​​意选择，不需要以pi / 2n的形式。 该方法使用FCW限制算法，其降低DCO的电源电压灵敏度，并且能够显着减小电容器组的面积，否则将需要它。

公开(公告)号：US08477631B2

公开(公告)日：2013-07-02

申请号：US12546867

申请日：2009-08-25

申请人： Sthanunathan Ramakrishnan ,  Bijoy Bhukania ,  Jawaharlal Tangudu ,  Sarma S Gunturi ,  Jaiganesh Balakrishnan ,  Rakesh Kumar ,  Abhijit Kumar Das ,  Yogesh Darwhekar

发明人： Sthanunathan Ramakrishnan ,  Bijoy Bhukania ,  Jawaharlal Tangudu ,  Sarma S Gunturi ,  Jaiganesh Balakrishnan ,  Rakesh Kumar ,  Abhijit Kumar Das ,  Yogesh Darwhekar

IPC分类号： H04B7/00

CPC分类号： H04L12/12 ,  H04W24/00 ,  H04W28/18 ,  H04W52/028 ,  H04W84/12 ,  H04W84/18 ,  H04W88/02 ,  Y02D70/142 ,  Y02D70/144 ,  Y02D70/162 ,  Y02D70/23

摘要： A receiver in a packet based communication system includes a programmable block and a detection block that detects at least one of an operating condition of the receiver and a protocol condition of the communication system. Further, the receiver includes a control circuit coupled to the programmable block that controls the programmable block to transition to a set of radio modes according to at least one of the operating condition and the protocol condition.

摘要翻译： 基于分组的通信系统中的接收机包括可编程块和检测接收机的操作条件和通信系统的协议条件中的至少一个的检测块。 此外，接收机包括耦合到可编程块的控制电路，其根据操作条件和协议条件中的至少一个控制可编程块向一组无线电模式转变。

公开(公告)号：US07961123B2

公开(公告)日：2011-06-14

申请号：US12575337

申请日：2009-10-07

申请人： Viswanathan Nagarajan ,  Sriram Murali ,  Sthanunathan Ramakrishnan ,  Visvesvaraya Pentakota ,  Jaiganesh Balakrishnan

发明人： Viswanathan Nagarajan ,  Sriram Murali ,  Sthanunathan Ramakrishnan ,  Visvesvaraya Pentakota ,  Jaiganesh Balakrishnan

IPC分类号： H03M1/06

CPC分类号： H03M1/1057 ,  H03M1/0836 ,  H03M1/1215

摘要： A time-interleaved (TI) analog-to-digital converter (ADC) is provided. The TI ADC generally comprises a clock generator, two or more ADCs, adjustable delay elements, and an estimator. The clock generator generates clock signals. Each ADC is associated with at least one of the clock signals so as to sample an input signal that is generally wide-sense stationary at sampling instants, where correlation function exist between samples from a two or more of the ADCs that is a function of the time differences between associated sampling instants. The estimator is coupled to each of the adjustable delay elements and each of the ADCs so as to calculate the correlation function and adjust the adjustable delay elements to account for sampling mismatch between the ADCs based at least in part on the correlation function.

摘要翻译： 提供了时间交织（TI）模数转换器（ADC）。 TI ADC通常包括时钟发生器，两个或更多个ADC，可调延迟元件和估计器。 时钟发生器产生时钟信号。 每个ADC与至少一个时钟信号相关联，以便在采样时刻对通常为宽静态的输入信号进行采样，其中相关函数存在于两个或更多个ADC之间的样本之间，该两个或更多个ADC是 相关抽样时间之间的时间差异。 估计器耦合到每个可调节延迟元件和每个ADC，以便计算相关函数，并且至少部分地基于相关函数来调整可调延迟元件以考虑ADC之间的采样失配。

公开(公告)号：US20110006933A1

公开(公告)日：2011-01-13

申请号：US12575337

申请日：2009-10-07

申请人： Viswanathan Nagarajan ,  Sriram Murali ,  Sthanunathan Ramakrishnan ,  Visvesvaraya Pentakota ,  Jaiganesh Balakrishnan

发明人： Viswanathan Nagarajan ,  Sriram Murali ,  Sthanunathan Ramakrishnan ,  Visvesvaraya Pentakota ,  Jaiganesh Balakrishnan

IPC分类号： H03M1/06 ,  H03M1/66

CPC分类号： H03M1/1057 ,  H03M1/0836 ,  H03M1/1215

摘要： A time-interleaved (TI) analog-to-digital converter (ADC) is provided. The TI ADC generally comprises a clock generator, two or more ADCs, adjustable delay elements, and an estimator. The clock generator generates clock signals. Each ADC is associated with at least one of the clock signals so as to sample an input signal that is generally wide-sense stationary at sampling instants, where correlation function exist between samples from a two or more of the ADCs that is a function of the time differences between associated sampling instants. The estimator is coupled to each of the adjustable delay elements and each of the ADCs so as to calculate the correlation function and adjust the adjustable delay elements to account for sampling mismatch between the ADCs based at least in part on the correlation function.

摘要翻译： 提供了时间交织（TI）模数转换器（ADC）。 TI ADC通常包括时钟发生器，两个或更多个ADC，可调延迟元件和估计器。 时钟发生器产生时钟信号。 每个ADC与至少一个时钟信号相关联，以便在采样时刻对通常为宽静态的输入信号进行采样，其中相关函数存在于两个或更多个ADC之间的样本之间，该两个或更多个ADC是 相关抽样时间之间的时间差异。 估计器耦合到每个可调节延迟元件和每个ADC，以便计算相关函数，并且至少部分地基于相关函数来调整可调延迟元件以考虑ADC之间的采样失配。

公开(公告)号：US09001948B2

公开(公告)日：2015-04-07

申请号：US12977094

申请日：2010-12-23

申请人： Sthanunathan Ramakrishnan

发明人： Sthanunathan Ramakrishnan

IPC分类号： H04L27/18 ,  H04L27/22 ,  H04L27/00 ,  H04L27/06 ,  H04L27/04 ,  H04L27/20 ,  H04L25/03 ,  H04L27/34

CPC分类号： H04L25/03834 ,  H04L27/2017 ,  H04L27/3411

摘要： A transmitter used in a communication system includes a raised cosine filter for transmit pulse shaping. A receiver in the communication system, designed to receive and demodulate transmissions from the transmitter, includes a root-raised cosine filter for receive pulse shaping. The use of a raised cosine filter in the transmitter enables reduction of peak-to-average ratio (PAR) of the output of a power amplifier used in the transmitter, enabling the power amplifier to be implemented to have relatively higher power efficiency than otherwise. In an embodiment, the transmitter and receiver employ π/2-shift binary phase-shift keying (π/2 BPSK), and the raised cosine filter in the transmitter is implemented to have a roll-off factor of 0.5 and a total length of four symbol periods. In an embodiment, the root-raised cosine filter is implemented to have a roll-of factor of 0.2 and a length of four symbol periods.

摘要翻译： 在通信系统中使用的发射机包括用于发射脉冲整形的升余弦滤波器。 通信系统中的接收机，用于接收和解调来自发射机的传输，包括用于接收脉冲整形的根升余弦滤波器。 在发射机中使用升余弦滤波器能够降低在发射机中使用的功率放大器的输出的峰均比（PAR），使功率放大器能够实现比其它功率效率更高的功率效率。 在一个实施例中，发射机和接收机采用＆pgr / 2移位二进制相移键控（＆pgr / / BPSK），并且发射机中的升余弦滤波器被实现为具有0.5的滚降因子和总共 四个符号周期的长度。 在一个实施例中，根升余弦滤波器被实现为具有0.2的折叠因子和四个符号周期的长度。

公开(公告)号：US20130154879A1

公开(公告)日：2013-06-20

申请号：US13330473

申请日：2011-12-19

申请人： Sthanunathan Ramakrishnan ,  Sandeep Rao

发明人： Sthanunathan Ramakrishnan ,  Sandeep Rao

IPC分类号： G01S19/42

CPC分类号： G01S19/426 ,  G01S19/20

摘要： Methods and integrated circuits for performing receiver autonomous integrity monitoring (RAIM) in global navigation satellite system (GNSS) receivers are disclosed. In an embodiment, a first information comprising current position related information is accessed. A second information comprising predicted position related information is accessed based on previously received information. A solution is computed based on the first information and the second information and a presence of outlier information is determined in at least one of the first information and the second information based on the solution.

摘要翻译： 公开了用于在全球导航卫星系统（GNSS）接收机中执行接收机自主完整性监测（RAIM）的方法和集成电路。 在一个实施例中，访问包括当前位置相关信息的第一信息。 基于先前接收到的信息来访问包括预测位置相关信息的第二信息。 基于第一信息和第二信息计算解决方案，并且基于解决方案在第一信息和第二信息中的至少一个中确定离群信息的存在。

公开(公告)号：US20070274205A1

公开(公告)日：2007-11-29

申请号：US11420619

申请日：2006-05-26

申请人： Karthik Ramasubramanian ,  Sthanunathan Ramakrishnan

发明人： Karthik Ramasubramanian ,  Sthanunathan Ramakrishnan

IPC分类号： H04J3/14 ,  H04L12/56

CPC分类号： H04L7/042 ,  H04L27/2647

摘要： The present invention provides a system for obviating interference effects in packet detection within a wireless communications network. A plurality of reference signals is provided—a first of which corresponds to desired packets, and the remainder of which correspond to undesired packets or interference. A plurality of cross-correlation constructs corresponds, respectively, to the plurality of reference signals. Each cross-correlation construct correlates an incoming signal to a plurality of repetitions of its respective reference signal. An analysis construct compares output from each cross-correlation construct with other cross-correlation construct outputs, and with a threshold value, to determine which incoming signal corresponds to desired packet data. Once this incoming signal is identified, packets from the signal may be reliably received.

摘要翻译： 本发明提供了一种用于消除无线通信网络内的分组检测中的干扰影响的系统。 提供了多个参考信号 - 第一个参考信号对应于期望的分组，其余部分对应于不期望的分组或干扰。 多个互相关构造分别对应于多个参考信号。 每个互相关构造将输入信号与其相应参考信号的多个重复相关联。 分析构造将来自每个互相关构造的输出与其他互相关构造输出和阈值进行比较，以确定哪个输入信号对应于期望的分组数据。 一旦该输入信号被识别，则可以可靠地接收来自信号的分组。