Abstract:
A signal shielding technique that assigns voltage potential to shield wires based on the dominant switching direction of a signal is provided. The dominant switching direction is determined based on pre-charge based logic that drives the signal. By determining the voltage potential the signal is more likely to transition to, the shield wires can be implemented so that a discharge event occurs during the dominant transition. Because the signal is more likely to switch in the dominant switching direction, power supply collapses associated with charging events may be reduced.
Abstract:
A method and apparatus for assigning decoupling capacitors on an integrated circuit such that leakage power is minimized is provided. Particularly, the method and apparatus use an available capacitance area of an integrated circuit, a capacitance requirement of the integrated circuit, an available thin-oxide capacitance amount, and an available thick-oxide capacitance amount to generate an assignment that indicates what percentage of the available capacitance area should be filled with thin-oxide capacitors and what percentage of the available capacitance area should be filled with thick-oxide capacitors in order to meet the capacitance requirement and minimize leakage power attributable to the thin-oxide and thick-oxide capacitors.
Abstract:
A 180 degree bump placement layout for an integrated circuit power grid is provided. This layout improves integrated circuit performance and reliability and gives an integrated circuit designer added flexibility and uniformity in designing the integrated circuit. Further, a patterned bump array for a top metal layer of an integrated circuit having a plurality of 180 degree bump placement structures is provided.
Abstract:
A 90 degree bump placement layout for an integrated circuit power grid is provided. This layout improves integrated circuit performance and reliability and gives an integrated circuit designer added flexibility and uniformity in designing the integrated circuit. Further, a patterned bump array for a top metal layer of an integrated circuit having a plurality of 90 degree bump placement structures is provided.
Abstract:
A method for preferentially shielding a signal to increase implicit decoupling capacitance is provided. The signal is preferentially shielded by using a probability of the signal being at a specific value to assign a shield potential. Further, an integrated circuit that preferentially shields a signal to increase decoupling capacitance by using a probability of the signal being at a specific value to assign a shield potential is provided. Further, a computer system for preferentially shielding a signal to increase decoupling capacitance by using a probability of the signal being at a specific value to assign a shield potential is provided. Further, a computer readable medium having executable instructions for preferentially shielding a signal to increase implicit decoupling capacitance by using a probability of the signal being at a specific value to assign a shield potential is provided. Further, a method to increase system performance by increasing implicit decoupling capacitance is provided.
Abstract:
A method that preferentially shields a signal to increase decoupling capacitance is provided. The signal is preferentially shielded based on a probability of the signal being at a specific value. Because the shield may also be used to form the power and ground grid, a balanced number of power versus ground lines is desired. A method for inverting the signal to balance the number of power versus ground lines is provided. Further, a method to increase system performance by increasing implicit decoupling capacitance is provided.
Abstract:
An integrated circuit that preferentially shields a signal to increase decoupling capacitance is provided. The signal is preferentially shielded based on a probability of the signal being at a specific value. Further, a method for increasing an amount of decoupling capacitance on a circuit through preferential shielding is provided. Further, a method to increase system performance by increasing implicit decoupling capacitance is provided.
Abstract:
A 120 degree bump placement layout for an integrated circuit power grid is provided. This layout improves integrated circuit performance and reliability and gives an integrated circuit designer added flexibility and uniformity in designing the integrated circuit. Further, a patterned bump array for a top metal layer of an integrated circuit having a plurality of 120 degree bump placement structures is provided.
Abstract:
A technique for actively shielding a signal such that a signal driver of the signal only participates in discharge events is provided. Because the signal driver only participates in discharge events, the signal driver is non-interacting with respect to other driver devices. Shield wires are set such that an active transition on the signal causes a discharge of capacitance between the signal and the shield wires.
Abstract:
A 150 degree bump placement layout for an integrated circuit power grid is provided. This layout improves integrated circuit performance and reliability and gives an integrated circuit designer added flexibility and uniformity in designing the integrated circuit. Further, a patterned bump array for a top metal layer of an integrated circuit having a plurality of 150 degree bump placement structures is provided.