Semiconductor Memory Devices Having Variable Resistor And Methods Of Fabricating The Same
    1.
    发明申请
    Semiconductor Memory Devices Having Variable Resistor And Methods Of Fabricating The Same 有权
    具有可变电阻器的半导体存储器件及其制造方法

    公开(公告)号:US20120091422A1

    公开(公告)日:2012-04-19

    申请号:US13221242

    申请日:2011-08-30

    IPC分类号: H01L45/00

    摘要: According to a method of fabricating the semiconductor memory device, a contact plug can be protected while mold openings are formed. A semiconductor memory device may include a mold dielectric layer on an entire surface of a substrate, the substrate including a first region and a second region. A contact plug may be provided in a contact hole formed through the mold dielectric layer in the first region. A variable resistor may be provided in a mold opening foamed through the mold dielectric layer in the second region. An upper surface of the contact plug may be at a level equal to or lower than an upper surface of the mold dielectric layer.

    摘要翻译: 根据制造半导体存储器件的方法,可以在形成开口的同时保护接触塞。 半导体存储器件可以在衬底的整个表面上包括模具电介质层,该衬底包括第一区域和第二区域。 接触插塞可以设置在通过第一区域中的模具电介质层形成的接触孔中。 可变电阻器可以设置在通过第二区域中的模具电介质层发泡的模制开口中。 接触插塞的上表面可以处于等于或低于模具电介质层的上表面的水平。

    Semiconductor memory devices having variable resistor and methods of fabricating the same
    2.
    发明授权
    Semiconductor memory devices having variable resistor and methods of fabricating the same 有权
    具有可变电阻器的半导体存储器件及其制造方法

    公开(公告)号:US08766232B2

    公开(公告)日:2014-07-01

    申请号:US13221242

    申请日:2011-08-30

    IPC分类号: H01L47/00 H01L27/24 H01L45/00

    摘要: According to a method of fabricating the semiconductor memory device, a contact plug can be protected while mold openings are formed. A semiconductor memory device may include a mold dielectric layer on an entire surface of a substrate, the substrate including a first region and a second region. A contact plug may be provided in a contact hole formed through the mold dielectric layer in the first region. A variable resistor may be provided in a mold opening formed through the mold dielectric layer in the second region. An upper surface of the contact plug may be at a level equal to or lower than an upper surface of the mold dielectric layer.

    摘要翻译: 根据制造半导体存储器件的方法,可以在形成开口的同时保护接触塞。 半导体存储器件可以在衬底的整个表面上包括模具电介质层,该衬底包括第一区域和第二区域。 接触插塞可以设置在通过第一区域中的模具电介质层形成的接触孔中。 可变电阻器可以设置在通过第二区域中的模具电介质层形成的模具开口中。 接触插塞的上表面可以处于等于或低于模具电介质层的上表面的水平。