公开(公告)号：US5933708A

公开(公告)日：1999-08-03

申请号：US843931

申请日：1997-04-17

Applicant: Sung Min Sim ,  Young Hee Song ,  Young Do Kweon ,  Hai Jeong Sohn

Inventor： Sung Min Sim ,  Young Hee Song ,  Young Do Kweon ,  Hai Jeong Sohn

IPC: H01L21/60 ,  H01L23/28 ,  H01L23/495 ,  H01L23/50 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC classification number: H01L24/32 ,  H01L23/4951 ,  H01L24/06 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2224/85399 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/181

Abstract: A method for bonding a semiconductor chip to a lead frame in a LOC type semiconductor package in which a plurality of inner leads are bonded to an active surface of the semiconductor chip. A semiconductor chip is prepared with a partially-cured polyimide layer on the active surface. One or more strips of polyimide tape is attached to the inner leads. The semiconductor chip is attached to the inner leads by making an intermediate pressure bond between the polyimide tape and the partially-cured polyimide coating layer on the active surface. The polyimide coating layer is then cured.

Abstract translation: 一种用于将半导体芯片接合到其中多个内部引线被结合到半导体芯片的有源表面的LOC型半导体封装中的引线框架的方法。 在活性表面上制备具有部分固化的聚酰亚胺层的半导体芯片。 一条或多条聚酰亚胺胶条连接在内引线上。 半导体芯片通过在聚酰亚胺胶带和活性表面上的部分固化的聚酰亚胺涂层之间进行中间压力粘合而附接到内引线。 聚酰亚胺涂层然后固化。

公开(公告)号：US5840614A

公开(公告)日：1998-11-24

申请号：US744376

申请日：1996-11-07

Applicant: Sung Min Sim ,  Do Yun Hwang

Inventor： Sung Min Sim ,  Do Yun Hwang

IPC: H01L21/301 ,  H01L21/304 ,  H01L21/306 ,  H01L21/68 ,  H01L21/302

CPC classification number: H01L21/6835 ,  H01L21/3043 ,  H01L21/6836 ,  H01L2221/68327 ,  H01L2221/6834

Abstract: A process for producing semiconductor devices using ultraviolet sensitive tape including the steps of forming a plurality of chips on a first surface of a semiconductor wafer, adhering an ultraviolet sensitive tape to the first surface of the semiconductor wafer, back lapping a second surface of the wafer, opposite to the first surface, and irradiating the ultraviolet sensitive tape with ultraviolet rays to release the ultraviolet sensitive tape from the wafer.

Abstract translation: 一种使用紫外线敏感带的半导体器件的制造方法，包括以下步骤：在半导体晶片的第一表面上形成多个芯片，将紫外线敏感带粘附到半导体晶片的第一表面，背面研磨晶片的第二表面 与第一表面相对，并且用紫外线照射紫外线敏感带以从晶片释放紫外线敏感带。

公开(公告)号：US5753532A

公开(公告)日：1998-05-19

申请号：US704996

申请日：1996-08-29

Applicant: Sung Min Sim

Inventor： Sung Min Sim

IPC: H01L23/48 ,  H01L21/56 ,  H01L23/495 ,  H01L23/50 ,  H01L21/60

CPC classification number: H01L23/49558 ,  H01L21/565 ,  H01L24/27 ,  H01L24/97 ,  H01L2224/05554 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/181

Abstract: A method for manufacturing semiconductor chip package comprising steps of: (a) preparing a lead frame which comprises a pair of opposing side rails which have a plurality of through holes on their upper surface; a die pad onto which a chip will be mounted; a pair of rows of leads, each row being disposed at both sides of the die pad at a distance; and tiebars for mechanically and integrally connecting said die pad to said side rails; (b) filling a resin compound between leads and curing the resin compound to make dambars; (c) attaching said chip to an upper surface of said die pad, and electrically connecting said chip to leads; (d) encapsulating said chip, said die pad, said dambars, a part of said leads and a part of said tiebars to give a package body which is still attached to said lead frame; and (e) cutting said tiebars from lead frame to separate an individual package; and (f) forming leads extending from the package to have an appropriate bend shape is provided.

Abstract translation: 一种制造半导体芯片封装的方法，包括以下步骤：（a）制备引线框架，该引线框架包括在其上表面上具有多个通孔的一对相对的侧轨; 将安装芯片的芯片焊盘; 一排引线，每排以一定距离设置在管芯焊盘的两侧; 以及用于将所述管芯焊盘机械地和一体地连接到所述侧轨的连杆; （b）在引线之间填充树脂化合物并固化树脂化合物以制成堰塞; （c）将所述芯片附接到所述芯片焊盘的上表面，并将所述芯片电连接到引线; （d）封装所述芯片，所述芯片焊盘，所述绝缘体，所述引线的一部分和所述拉杆的一部分，以给出仍然附接到所述引线框架的封装体; 和（e）从引线框架切割所述拉杆以分离单独的包装; 和（f）形成从封装延伸以具有适当的弯曲形状的引线。