Bipolar transistor adjustable shunt regulator circuit
    1.
    发明授权
    Bipolar transistor adjustable shunt regulator circuit 有权
    双极晶体管可调并联稳压电路

    公开(公告)号:US09448575B2

    公开(公告)日:2016-09-20

    申请号:US14018281

    申请日:2013-09-04

    Applicant: Supertex, Inc.

    CPC classification number: G05F1/613 G05F3/30

    Abstract: An adjustable shunt regulator circuit has two current paths in parallel, with each current path having a bipolar transistor therein with the bases of the bipolar transistors of the two current paths connected in common. One of the current paths has a high impedance node. A MOS transistor has a gate connected to the high impedance node, and a source and a drain. A resistor divide circuit is connected in parallel to the source and drain of the MOS transistor and provides the output of the regulator circuit. The resistor divide circuit has a first resistor connected in series with a second resistor at a first node. A feedback connects the first node to the bases of the bipolar transistors connected in common of the two current paths.

    Abstract translation: 可调并联调节器电路具有并联的两个电流路径,每个电流路径具有双极晶体管,其中两个电流路径的双极晶体管的基极共同连接。 其中一条电​​流路径具有高阻抗节点。 MOS晶体管具有连接到高阻抗节点的栅极以及源极和漏极。 电阻分压电路与MOS晶体管的源极和漏极并联连接,并提供稳压电路的输出。 电阻分压电路具有与第一节点处的第二电阻器串联连接的第一电阻器。 反馈将第一节点连接到两个电流路径共同连接的双极晶体管的基极。

    OP-AMP Sharing Technique to Remove Memory Effect in Pipelined Circuit
    2.
    发明申请
    OP-AMP Sharing Technique to Remove Memory Effect in Pipelined Circuit 有权
    OP-AMP共享技术去除流水线电路中的记忆效应

    公开(公告)号:US20140097897A1

    公开(公告)日:2014-04-10

    申请号:US14025724

    申请日:2013-09-12

    Applicant: Supertex, Inc.

    CPC classification number: H03F3/45179 H03F3/005 H03M1/1225 H03M1/167 H03M1/44

    Abstract: This document describes a new op-amp sharing technique for pipeline ADC without memory effect. The key features of this technique are: the usage of negative impedance converter and scaled replica of the op-amp input device to achieve zero error voltage, which in turns achieve low power dissipation due to the removal of the tradeoff between op-amp sharing and memory effect. With this technique much lower operation of pipeline ADC can be achieved for applications of data communications and image signal processing.

    Abstract translation: 本文档描述了一种用于无记忆效应的流水线ADC的新型运算放大器共享技术。 该技术的主要特点是:使用负阻抗转换器和运算放大器输入设备的缩放复本来实现零误差电压,从而实现低功耗,这是由于消除了运算放大器共享和 记忆效应。 使用这种技术,可以实现数据通信和图像信号处理应用的管道ADC的低得多的操作。

    Adjustable Shunt Regulator Circuit
    3.
    发明申请
    Adjustable Shunt Regulator Circuit 有权
    可调并联稳压电路

    公开(公告)号:US20140009128A1

    公开(公告)日:2014-01-09

    申请号:US14018281

    申请日:2013-09-04

    Applicant: Supertex, Inc.

    CPC classification number: G05F1/613 G05F3/30

    Abstract: An adjustable shunt regulator circuit has two current paths in parallel, with each current path having a bipolar transistor therein with the bases of the bipolar transistors of the two current paths connected in common. One of the current paths has a high impedance node. A MOS transistor has a gate connected to the high impedance node, and a source and a drain. A resistor divide circuit is connected in parallel to the source and drain of the MOS transistor and provides the output of the regulator circuit. The resistor divide circuit has a first resistor connected in series with a second resistor at a first node. A feedback connects the first node to the bases of the bipolar transistors connected in common of the two current paths.

    Abstract translation: 可调并联调节器电路具有并联的两个电流路径,每个电流路径具有双极晶体管,其中两个电流路径的双极晶体管的基极共同连接。 其中一条电​​流路径具有高阻抗节点。 MOS晶体管具有连接到高阻抗节点的栅极以及源极和漏极。 电阻分压电路与MOS晶体管的源极和漏极并联连接,并提供稳压电路的输出。 电阻分压电路具有与第一节点处的第二电阻器串联连接的第一电阻器。 反馈将第一节点连接到两个电流路径共同连接的双极晶体管的基极。

    OP-AMP sharing technique to remove memory effect in pipelined circuit
    4.
    发明授权
    OP-AMP sharing technique to remove memory effect in pipelined circuit 有权
    OP-AMP共享技术,以消除流水线电路中的记忆效应

    公开(公告)号:US09154091B2

    公开(公告)日:2015-10-06

    申请号:US14025724

    申请日:2013-09-12

    Applicant: Supertex, Inc.

    CPC classification number: H03F3/45179 H03F3/005 H03M1/1225 H03M1/167 H03M1/44

    Abstract: This document describes a new op-amp sharing technique for pipeline ADC without memory effect. The key features of this technique are: the usage of negative impedance converter and scaled replica of the op-amp input device to achieve zero error voltage, which in turns achieve low power dissipation due to the removal of the tradeoff between op-amp sharing and memory effect. With this technique much lower operation of pipeline ADC can be achieved for applications of data communications and image signal processing.

    Abstract translation: 本文档描述了一种用于无记忆效应的流水线ADC的新型运算放大器共享技术。 该技术的主要特点是:使用负阻抗转换器和运算放大器输入设备的缩放复本来实现零误差电压,从而实现低功耗,这是由于消除了运算放大器共享和 记忆效应。 使用这种技术,可以实现数据通信和图像信号处理应用的管道ADC的低得多的操作。

Patent Agency Ranking