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公开(公告)号：US09825590B2
公开(公告)日：2017-11-21
申请号：US13503168
申请日：2009-10-23
CPC分类号： H03D1/04 , H03D7/12 , H03D7/1458 , H03D7/1466 , H03D7/165 , H03D2200/0088
摘要： The present disclosure generally relates to the field of receiver structures in radio communication systems and more specifically to passive mixers in the receiver structure and to a technique for converting a first signal having a first frequency into a second signal having a second frequency by using a third signal having a third frequency. A passive mixer for converting a first signal having a first frequency into a second signal having a second frequency by using a third signal having a third frequency comprises a cancellation component 220 for generating a first cancellation signal for cancelling second order intermodulation components by superimposing the first signal weighted by a cancellation value on the third signal; and a mixing component 231 having a first terminal 232 for receiving the first signal, a second terminal 234 for outputting the second signal, and a third terminal 236 for receiving the first cancellation signal, wherein the mixing component 231 is adapted to provide the second signal as output at the second terminal 234 by mixing the first signal provided as input at the first terminal 232 and the first cancellation signal provided as input at the third terminal 236.
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公开(公告)号：US20120252374A1
公开(公告)日：2012-10-04
申请号：US13503168
申请日：2009-10-23
CPC分类号： H03D1/04 , H03D7/12 , H03D7/1458 , H03D7/1466 , H03D7/165 , H03D2200/0088
摘要： The present disclosure generally relates to the field of receiver structures in radio communication systems and more specifically to passive mixers in the receiver structure and to a technique for converting a first signal having a first frequency into a second signal having a second frequency by using a third signal having a third frequency. A passive mixer for converting a first signal having a first frequency into a second signal having a second frequency by using a third signal having a third frequency comprises a cancellation component 220 for generating a first cancellation signal for cancelling second order intermodulation components by superimposing the first signal weighted by a cancellation value on the third signal; and a mixing component 231 having a first terminal 232 for receiving the first signal, a second terminal 234 for outputting the second signal, and a third terminal 236 for receiving the first cancellation signal, wherein the mixing component 231 is adapted to provide the second signal as output at the second terminal 234 by mixing the first signal provided as input at the first terminal 232 and the first cancellation signal provided as input at the third terminal 236.
摘要翻译： 本公开通常涉及无线电通信系统中的接收机结构领域，更具体地涉及接收机结构中的无源混频器以及通过使用第三频率将具有第一频率的第一信号转换成具有第二频率的第二信号的技术 信号具有第三频率。 一种无源混频器，用于通过使用具有第三频率的第三信号将具有第一频率的第一信号转换为具有第二频率的第二信号包括消除部件220，用于产生用于通过将第一频率叠加的第二次互调分量 信号由第三信号的抵消值加权; 以及混合部件231，其具有用于接收第一信号的第一端子232，用于输出第二信号的第二端子234和用于接收第一抵消信号的第三端子236，其中混合部件231适于提供第二信号 作为第二端子234处的输出，通过混合在第一端子232处作为输入提供的第一信号和在第三端子236处作为输入提供的第一抵消信号。
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公开(公告)号：US08976692B2
公开(公告)日：2015-03-10
申请号：US13522662
申请日：2011-01-20
申请人： Jonas Persson , Sven Mattisson
发明人： Jonas Persson , Sven Mattisson
CPC分类号： H04B1/0475 , H04B1/302 , H04L25/061 , H04L27/2647 , H04L27/364 , H04L2027/0016
摘要： A combination of a phase shifter, a measurement receiver, and an offset estimator enable the d.c. offset in the transmit path of a quadrature transmitter to be distinguished from the d.c. offset in the measurement receiver. The measurement receiver performs a first measurement on the transmit path output with a “normal” phase shift of 0 degrees and 90 degrees for in-phase (I) and quadrature (Q) components, and a second measurement with a “special” phase shift for the I and Q components. In one embodiment, the “special” phase shift for the I and Q components is 180 degrees and 270 degrees, respectively.
摘要翻译： 移相器，测量接收器和偏移估计器的组合使得直流 在正交发射机的发射路径中的偏移量与d.c.进行区分。 在测量接收器中偏移。 测量接收机对于同相（I）和正交（Q）分量以0度和90度的“正常”相移对发射路径输出执行第一测量，并且具有“特殊”相移的第二测量 用于I和Q组件。 在一个实施例中，I和Q分量的“特殊”相移分别为180度和270度。
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4.发明授权公开(公告)号：US08811241B2
公开(公告)日：2014-08-19
申请号：US12773097
申请日：2010-05-04
申请人： Leif Wilhelmsson , Erik Carlberg , Sven Mattisson , Hans Stattin
发明人： Leif Wilhelmsson , Erik Carlberg , Sven Mattisson , Hans Stattin
IPC分类号： H04J1/00
摘要： A communication device has a controller operatively connected to at least a first transceiver and a second transceiver, wherein the first transceiver receives signals on one or more channels within a first frequency band and the second transceiver transmits signals on one or more channels within a second frequency band, wherein the first and second frequency bands are adjacent one another so that each of the first and second frequency bands has an adjacent border and a nonadjacent border. Coexistence between the first and second transceivers is achieved by adjusting receive and/or transmit filters associated with the transceivers to create a guard band that is located more in the first frequency band if the second transceiver is using frequencies close to its adjacent border, and a guard band that is more in the second frequency band if the second transceiver is not using frequencies close to its adjacent border.
摘要翻译： 通信设备具有可操作地连接到至少第一收发器和第二收发器的控制器，其中第一收发器在第一频带内的一个或多个信道上接收信号，并且第二收发器在第二频率内的一个或多个信道上发送信号 频带，其中第一和第二频带彼此相邻，使得第一和第二频带中的每一个具有相邻的边界和不相邻的边界。 通过调整与收发器相关联的接收和/或发射滤波器来实现第一和第二收发器之间的共存，以产生更靠近第一频带的保护频带，如果第二收发器使用接近其相邻边界的频率，以及 如果第二收发器不使用靠近其相邻边界的频率，则在第二频带中更多的保护频带。
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公开(公告)号：US08626086B2
公开(公告)日：2014-01-07
申请号：US13205984
申请日：2011-08-09
IPC分类号： H04B1/40
CPC分类号： H04B1/44 , H04B1/3833 , H04B1/408 , H04B1/715 , H04B15/00 , H04B2001/7152 , H04J3/10 , H04L5/1461 , H04L27/122
摘要： An entire radio transceiver can be completely integrated into one IC chip. In order to integrate the IF filters on the chip, a heterodyne architecture with a low IF is used. A single, directly modulated VCO is used for both up-conversion during transmission, and down-conversion during reception. Bond-wires are used as resonators in the oscillator tank for the VCO. A TDD scheme is used in the air interface to eliminate cross-talk or leakage. A Gaussian-shaped binary FSK modulation scheme is used to provide a number of other implementation advantages.
摘要翻译： 整个无线电收发器可以完全集成到一个IC芯片中。 为了在芯片上集成IF滤波器，使用具有低IF的外差架构。 单个直接调制的VCO用于传输期间的上转换和接收期间的下变频。 在VCO的振荡器槽中使用接合线作为谐振器。 在空中接口中使用TDD方案来消除串扰或泄漏。 高斯形二进制FSK调制方案用于提供许多其他实现优点。
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6.发明授权Delta-sigma analog-to-digital converter, radio receiver, communication apparatus, method, and computer program 有权Delta-sigma模数转换器，无线电接收器，通信装置，方法和计算机程序公开(公告)号：US08199039B2
公开(公告)日：2012-06-12
申请号：US12997602
申请日：2009-05-15
申请人： Sven Mattisson
发明人： Sven Mattisson
IPC分类号： H03M3/04
摘要： A delta-sigma analog-to-digital converter (ADC) is disclosed. The ADC comprises a forward path structure; a feedback structure; and a first subtraction element arranged to receive an input signal to the delta-sigma analog-to-digital converter and a feedback signal from the feedback structure and output a difference signal, which is a difference between the input signal and the feedback signal, to the forward path structure, wherein the forward path structure comprises a quantizer arranged to convert an analog input signal to a digital representation; a forward path filter arranged to input the difference signal and provide an output signal to the quantizer, and the feedback structure comprises a first and a second branch, wherein the first branch comprises a first digital-to-analog converter arranged to provide output signals to the subtraction element; and a first feedback filter having a gain to frequency characteristic such that frequencies that are desired in the analog-to-digital conversion, compared to undesired frequencies, are attenuated in the feedback structure, and the second branch comprises a second digital-to-analog converter, wherein the first and second branches are fed by the digital representation and the outputs of the first and second branches are merged in a second subtraction element arranged to output a signal, which is a difference between the signals from the first and second branches, to the first subtraction element. A radio receiver, communication apparatus, method for analog-to-digital conversion, and computer program for implementing the method are also disclosed.
摘要翻译： 公开了一种Δ-Σ模数转换器（ADC）。 ADC包括前向路径结构; 反馈结构; 以及第一减法元件，其布置成接收到Δ-Σ模数转换器的输入信号和来自反馈结构的反馈信号，并将作为输入信号和反馈信号之间的差的差分信号输出到 所述前向路径结构，其中所述前向路径结构包括被配置为将模拟输入信号转换为数字表示的量化器; 一个前向路径滤波器，被布置成输入差分信号并向量化器提供输出信号，并且反馈结构包括第一和第二分支，其中第一分支包括第一数模转换器，其被布置成提供输出信号 减法元素; 以及具有增益至频率特性的第一反馈滤波器，使得与反馈结构相比，在模拟数字转换中期望的频率在反馈结构中衰减，并且第二分支包括第二数模转换器 转换器，其中所述第一和第二分支由所述数字表示馈送，并且所述第一和第二分支的输出被合并在被布置为输出作为来自所述第一和第二分支的信号之间的差的信号的第二减法元件中， 到第一个减法元素。 还公开了一种用于模数转换的无线电接收机，通信装置，方法和用于实现该方法的计算机程序。
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公开(公告)号：US08090320B2
公开(公告)日：2012-01-03
申请号：US12339630
申请日：2008-12-19
IPC分类号： H04B1/00
CPC分类号： H04B1/123 , H04B1/30 , H04L27/2647
摘要： Circuits and methods are disclosed for compensating for received signal distortion caused by non-linearities in wideband receivers. An exemplary receiver includes a distortion waveform generator configured to approximate non-linear response characteristics of a downconverter circuit used to downconvert the received radio frequency signal. The resulting estimated distortion waveform is filtered, using filter(s) substantially similar to those used for filtering an intermediate frequency signal that includes the desired signal and non-linear distortion products caused by strong interfering signals. The filtered estimated distortion waveform and intermediate frequency signal are sampled, to obtain a sampled distortion signal and a sampled signal of interest. The sampled distortion signal and the sampled signal of interest are divided into a plurality of frequency channels. For a selected number of frequency channels, the sampled distortion signal for a frequency channel is scaled, and subtracted from the corresponding sampled signal of interest for the same frequency channel to obtain reduced-interference signal samples for the frequency channel.
摘要翻译： 公开了用于补偿由宽带接收机中的非线性引起的接收信号失真的电路和方法。 示例性接收机包括失真波形发生器，其被配置为近似用于下变频接收的射频信号的下变频器电路的非线性响应特性。 使用基本上类似于用于滤波包括由强干扰信号引起的期望信号和非线性失真产物的中频信号的滤波器，所得到的估计失真波形被滤波。 对滤波的估计失真波形和中频信号进行采样，以获得采样的失真信号和感兴趣的采样信号。 采样的失真信号和感兴趣的采样信号被分成多个频道。 对于所选数量的频道，对频道的采样失真信号进行缩放，并从相同频率信道的对应采样信号中减去，以获得用于频率信道的减少干扰信号采样。
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公开(公告)号：US20080284533A1
公开(公告)日：2008-11-20
申请号：US12185320
申请日：2008-08-04
申请人： Sven Mattisson
发明人： Sven Mattisson
IPC分类号： H03B5/36
CPC分类号： H03B5/364
摘要： An electrical oscillator circuit comprising: a resonator comprised in the first subcircuit; and an active device comprised in the second subcircuit connected to energize the resonator to provide an oscillating electrical signal transmitted as a differential signal via electrical conductors to the second subcircuit. The oscillator is characterized in that the second subcircuit comprises means for receiving the differential signal transmitted via the electrical conductors and converting the differential signal to a single-ended signal with reference to the signal ground reference of the second subcircuit. Thereby a noise robust oscillator signal is provided with the use of very few components. Particularly suitable for oscillators embodied in an integrated circuit with the resonator mounted on a printed circuit board, PCB. And an integrated circuit.
摘要翻译： 一种电振荡器电路，包括：包括在所述第一子电路中的谐振器; 以及包括在所述第二子电路中的有源器件，其连接用于激励所述谐振器，以将经由电导体发送的差分信号的振荡电信号提供给所述第二子电路。 振荡器的特征在于，第二分支电路包括用于接收通过电导体发送的差分信号的装置，并且参考第二子电路的信号接地参考将差分信号转换成单端信号。 因此，使用非常少的组件来提供噪声鲁棒振荡器信号。 特别适用于具有安装在印刷电路板，PCB上的谐振器的集成电路中的振荡器。 和一个集成电路。
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公开(公告)号：US20070142019A1
公开(公告)日：2007-06-21
申请号：US11551464
申请日：2006-10-20
IPC分类号： H04B1/26
CPC分类号： H03D7/1441 , H03D7/1458 , H03D7/165 , H03D2200/0023 , H03D2200/0084 , H03H19/008
摘要： A method of providing an input signal to a mixer circuit comprises coupling an output signal from a low-noise amplifier circuit to a mixer input of the mixer circuit via an AC coupling circuit, comprising an inductive of capacitive coupling circuit. For capacitive coupling configurations, a coupling capacitor is configured to have a capacitance value determined as a function of a transconductance sensitivity of the mixer circuit. For balanced output configurations of the low-noise amplifier circuit, matched coupling capacitors are used for coupling the balanced output signals to respective inputs of the mixer circuit. In one embodiment, the mixer circuit comprises a quadrature mixer circuit, which may be in a balanced or double-balanced configuration. In another embodiment, the mixer circuit comprises a four-phase mixer circuit, which may be configured as a balanced four-phase mixer circuit coupled to the low-noise amplifier circuit via inductive or capacitive embodiments of the coupling circuit.
摘要翻译： 一种向混频器电路提供输入信号的方法包括：通过AC耦合电路将来自低噪声放大器电路的输出信号耦合到混频器电路的混频器输入，该AC耦合电路包括电容耦合电路的电感。 对于电容耦合配置，耦合电容器被配置为具有根据混频器电路的跨导灵敏度确定的电容值。 对于低噪声放大器电路的平衡输出配置，匹配的耦合电容用于将平衡输出信号耦合到混频器电路的相应输入。 在一个实施例中，混频器电路包括正交混频器电路，其可以是平衡或双平衡配置。 在另一个实施例中，混频器电路包括四相混频器电路，其可以被配置为通过耦合电路的电感或电容实施例耦合到低噪声放大器电路的平衡四相混频器电路。
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公开(公告)号：US20060062165A1
公开(公告)日：2006-03-23
申请号：US11271173
申请日：2005-11-11
CPC分类号： H04B1/44 , H04B1/3833 , H04B1/408 , H04B1/715 , H04B15/00 , H04B2001/7152 , H04J3/10 , H04L5/1461 , H04L27/122
摘要： An entire radio transceiver can be completely integrated into one IC chip. In order to integrate the IF filters on the chip, a heterodyne architecture with a low IF is used. A single, directly modulated VCO is used for both up-conversion during transmission, and down-conversion during reception. Bond-wires are used as resonators in the oscillator tank for the VCO. A TDD scheme is used in the air interface to eliminate cross-talk or leakage. A Gaussian-shaped binary FSK modulation scheme is used to provide a number of other implementation advantages.
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