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公开(公告)号:US20200006085A1
公开(公告)日:2020-01-02
申请号:US16383539
申请日:2019-04-12
发明人: Ya-Wen YEH , Yu-Tien SHEN , Shih-Chun HUANG , Po-Chin CHANG , Wei-Liang LIN , Yung-Sung YEN , Wei-Hao WU , Li-Te LIN , Pinyen LIN , Ru-Gun LIU
IPC分类号: H01L21/3213 , H01L21/66
摘要: In a method of manufacturing a semiconductor device, an underlying structure is formed over a substrate. A film is formed over the underlying structure. Surface topography of the film is measured and the surface topography is stored as topography data. A local etching is performed by using directional etching and scanning the substrate so that an entire surface of the film is subjected to the directional etching. A plasma beam intensity of the directional etching is adjusted according to the topography data.
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公开(公告)号:US20190341254A1
公开(公告)日:2019-11-07
申请号:US16512336
申请日:2019-07-15
发明人: Shih-Chun HUANG , Chin-Hsiang LIN , Chien-Wen LAI , Ru-Gun LIU , Wei-Liang LIN , Ya Hui CHANG , Yung-Sung YEN , Yu-Tien SHEN , Ya-Wen YEH
IPC分类号: H01L21/033 , H01L21/311 , H01L21/3213 , H01L21/768 , H01L21/3105
摘要: A method of fabricating a semiconductor device includes forming a hard mask layer over a substrate. A multi-layer resist is formed over the hard mask layer. The multi-layer resist is etched to form a plurality of openings in the multi-layer resist to expose a portion of the hard mask layer. Ion are directionally provided at an angle to the multi-layer resist to predominately contact sidewalls of the plurality of openings in the multi-layer resist rather than the hard mask layer. In one embodiment, the multi-layer resist is directionally etched by directing etch ions at an angle to predominately contact sidewalls of the plurality of openings in the multi-layer resist rather than the hard mask layer. In another embodiment, the multi-layer resist is directionally implanted by directing implant ions at an angle to predominately contact sidewalls of the plurality of openings in the multi-layer resist rather than the hard mask layer.
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公开(公告)号:US20210013048A1
公开(公告)日:2021-01-14
申请号:US17034043
申请日:2020-09-28
发明人: Ru-Gun LIU , Chih-Ming LAI , Wei-Liang LIN , Yung-Sung YEN , Ken-Hsien HSIEH , Chin-Hsiang LIN
IPC分类号: H01L21/311 , H01L21/027 , H01L21/768
摘要: In a method of forming a groove pattern extending in a first axis in an underlying layer over a semiconductor substrate, a first opening is formed in the underlying layer, and the first opening is extended in the first axis by directional etching to form the groove pattern.
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公开(公告)号:US20190164772A1
公开(公告)日:2019-05-30
申请号:US15967100
申请日:2018-04-30
发明人: Chin-Yuan TSENG , Yu-Tien SHEN , Wei-Liang LIN , Chih-Ming LAI , Kuo-Cheng CHING , Shi Ning JU , Li-Te LIN , Ru-Gun LIU
IPC分类号: H01L21/311 , H01L21/32
摘要: A method of reducing corner rounding during patterning of a substrate to form a prescribed pattern comprising a corner includes dividing the pattern into a first pattern and a second pattern, the first pattern forming a first edge of the corner and the second pattern forming a second edge of the corner. At least a portion of the second pattern overlaps the first pattern such that the first edge intersects with the second edge to form a corner of the prescribed pattern. The method further includes forming the first pattern in a first mask layer disposed on a substrate to expose the substrate and forming the second pattern in the first mask layer to expose the substrate. The substrate exposed through the first mask layer is then etched to obtain the pattern.
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公开(公告)号:US20210096473A1
公开(公告)日:2021-04-01
申请号:US16587710
申请日:2019-09-30
发明人: Ru-Gun LIU , Huicheng CHANG , Chia-Cheng CHEN , Jyu-Horng SHIEH , Liang-Yin CHEN , Shu-Huei SUEN , Wei-Liang LIN , Ya Hui CHANG , Yi-Nien SU , Yung-Sung YEN , Chia-Fong CHANG , Ya-Wen YEH , Yu-Tien SHEN
IPC分类号: G03F7/20 , H01L21/027
摘要: In a method of forming a pattern, a photo resist layer is formed over an underlying layer, the photo resist layer is exposed to an actinic radiation carrying pattern information, the exposed photo resist layer is developed to form a developed resist pattern, a directional etching operation is applied to the developed resist pattern to form a trimmed resist pattern, and the underlying layer is patterned using the trimmed resist pattern as an etching mask.
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公开(公告)号:US20200066523A1
公开(公告)日:2020-02-27
申请号:US16669065
申请日:2019-10-30
发明人: Chih-Ming LAI , Shih-Ming CHANG , Wei-Liang LIN , Chin-Yuan TSENG , Ru-Gun LIU
IPC分类号: H01L21/033 , H01L21/311
摘要: A method for forming a semiconductor device structure is provided. The method includes forming a first layer over a substrate. The first layer has a trench. The method includes forming first spacers over inner walls of the trench. The method includes removing a portion of the first spacers. The method includes forming a filling layer into the trench to cover the first spacers. The filling layer and the first spacers together form a strip structure. The method includes removing the first layer. The method includes forming second spacers over two opposite first sidewalls of the strip structure.
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公开(公告)号:US20200006078A1
公开(公告)日:2020-01-02
申请号:US16240402
申请日:2019-01-04
发明人: Ru-Gun LIU , Chih-Ming LAI , Wei-Liang LIN , Yung-Sung YEN , Ken-Hsien HSIEH , Chin-Hsiang LIN
IPC分类号: H01L21/311 , H01L21/027 , H01L21/768
摘要: In a method of forming a groove pattern extending in a first axis in an underlying layer over a semiconductor substrate, a first opening is formed in the underlying layer, and the first opening is extended in the first axis by directional etching to form the groove pattern.
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公开(公告)号:US20200335340A1
公开(公告)日:2020-10-22
申请号:US16921032
申请日:2020-07-06
发明人: Shih-Chun HUANG , Chiu-Hsiang CHEN , Ya-Wen YEH , Yu-Tien SHEN , Po-Chin CHANG , Chien Wen LAI , Wei-Liang LIN , Ya Hui CHANG , Yung-Sung YEN , Li-Te LIN , Pinyen LIN , Ru-Gun LIU , Chin-Hsiang LIN
IPC分类号: H01L21/033 , H01L21/027 , H01L21/311 , H01L21/02 , H01L21/265
摘要: A method of manufacturing a semiconductor device including operations of forming a first hard mask over an underlying layer on a substrate by a photolithographic and etching method, forming a sidewall spacer pattern having a first sidewall portion and a second sidewall portion on opposing sides of the first hard mask, etching the first sidewall portion, etching the first hard mask and leaving the second sidewall portion bridging a gap of the etched first hard mask, and processing the underlying layer using the second hard mask.
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公开(公告)号:US20200006121A1
公开(公告)日:2020-01-02
申请号:US16374150
申请日:2019-04-03
发明人: Ru-Gun LIU , Chin-Hsiang LIN , Chih-Ming LAI , Wei-Liang LIN , Yung-Sung YEN
IPC分类号: H01L21/768 , H01L27/12
摘要: In accordance with an aspect of the present disclosure, in a pattern forming method for a semiconductor device, a first opening is formed in an underlying layer disposed over a substrate. The first opening is expanded in a first axis by directional etching to form a first groove in the underlying layer. A resist pattern is formed over the underlying layer. The resist pattern includes a second opening only partially overlapping the first groove. The underlying layer is patterned by using the resist pattern as an etching mask to form a second groove.
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公开(公告)号:US20190157085A1
公开(公告)日:2019-05-23
申请号:US16149577
申请日:2018-10-02
发明人: Chih-Ming LAI , Shih-Ming CHANG , Wei-Liang LIN , Chin-Yuan TSENG , Ru-Gun LIU
IPC分类号: H01L21/033 , H01L21/311
摘要: A method for forming a semiconductor device structure is provided. The method includes forming a first layer over a substrate. The first layer has a trench. The method includes forming first spacers over inner walls of the trench. The method includes removing a portion of the first spacers. The method includes forming a filling layer into the trench to cover the first spacers. The filling layer and the first spacers together form a strip structure. The method includes removing the first layer. The method includes forming second spacers over two opposite first sidewalls of the strip structure. The method includes forming third spacers over second sidewalls of the second spacers. The method includes removing the filling layer and the second spacers.
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