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公开(公告)号：US20230317757A1
公开(公告)日：2023-10-05
申请号：US17828346
申请日：2022-05-31
发明人： Yen-Ting Chiang , Yen-Yu Chen , Wen Hao Chang , Tzu-Hsuan Hsu , Feng-Chi Hung , Shyh-Fann Ting , Jen-Cheng Liu
IPC分类号： H01L27/146
CPC分类号： H01L27/1463 , H01L27/14685 , H01L27/14643 , H01L27/14641
摘要： Various embodiments of the present disclosure are directed towards an image sensor including a plurality of photodetectors disposed within a substrate. The substrate comprises a front-side surface opposite a back-side surface. An outer isolation structure is disposed in the substrate and laterally surrounds the plurality of photodetectors. The outer isolation structure has a first height. An inner isolation structure is spaced between sidewalls of the outer isolation structure. The inner isolation structure is disposed between adjacent photodetectors in the plurality of photodetectors. The outer isolation structure and the inner isolation structure respectively extend from the back-side surface toward the front-side surface. The inner isolation structure comprises a second height less than the first height.
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公开(公告)号：US11430823B2
公开(公告)日：2022-08-30
申请号：US17069665
申请日：2020-10-13
发明人： Yen-Ting Chiang , Chun-Yuan Chen , Hsiao-Hui Tseng , Sheng-Chan Li , Yu-Jen Wang , Wei Chuang Wu , Shyh-Fann Ting , Jen-Cheng Liu , Dun-Nian Yaung
IPC分类号： H01L27/14 , H01L27/146
摘要： A semiconductor image sensor device includes a semiconductor substrate, a radiation-sensing region, and a first isolation structure. The radiation-sensing region is in the semiconductor substrate. The first isolation structure is in the semiconductor substrate and adjacent to the radiation-sensing region. The first isolation structure includes a bottom isolation portion in the semiconductor substrate, an upper isolation portion in the semiconductor substrate, and a diffusion barrier layer surrounding a sidewall of the upper isolation portion.
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公开(公告)号：US20220059583A1
公开(公告)日：2022-02-24
申请号：US17519784
申请日：2021-11-05
发明人： Chun-Yuan Chen , Ching-Chun Wang , Dun-Nian Yaung , Hsiao-Hui Tseng , Jhy-Jyi Sze , Shyh-Fann Ting , Tzu-Jui Wang , Yen-Ting Chiang , Yu-Jen Wang , Yuichiro Yamashita
IPC分类号： H01L27/146
摘要： The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes an image sensor disposed within a substrate. The substrate has sidewalls and a horizontally extending surface defining one or more trenches extending from a first surface of the substrate to within the substrate. One or more isolation structures are arranged within the one or more trenches. A doped region is arranged within the substrate laterally between sidewalls of the one or more isolation structures and the image sensor and vertically between the image sensor and the first surface of the substrate. The doped region has a higher concentration of a first dopant type than an abutting part of the substrate that extends along opposing sides of the image sensor.
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公开(公告)号：US20170207261A1
公开(公告)日：2017-07-20
申请号：US15477976
申请日：2017-04-03
发明人： Shyh-Fann Ting , Feng-Chi Hung , Jhy-Jyi Sze , Ching-Chun Wang , Dun-Nian Yaung
IPC分类号： H01L27/146
CPC分类号： H01L27/1469 , H01L27/1462 , H01L27/14623 , H01L27/14634 , H01L27/14636 , H01L27/1464 , H01L27/14685
摘要： Presented herein is a device including an image sensor having a plurality of pixels disposed in a substrate and configured to sense light through a back side of the substrate and an RDL disposed on a front side of the substrate and having a plurality of conductive elements disposed in one or more dielectric layers. A sensor shield is disposed over the back side of the substrate and extending over the image sensor. At least one via contacts the sensor shield and extends from the sensor shield through at least a portion of the RDL and contacts at least one of the plurality of conductive elements.
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公开(公告)号：US09666566B1
公开(公告)日：2017-05-30
申请号：US15138993
申请日：2016-04-26
发明人： Ju-Shi Chen , Cheng-Ying Ho , Chun-Chieh Chuang , Sheng-Chau Chen , Shih Pei Chou , Hui-Wen Shen , Dun-Nian Yaung , Ching-Chun Wang , Feng-Chi Hung , Shyh-Fann Ting
CPC分类号： H01L25/105 , H01L25/50 , H01L2225/1041 , H01L2225/1082
摘要： Methods for improving hybrid bond yield for semiconductor wafers forming 3DIC devices includes first and second wafers having dummy and main metal deposited and patterned during BEOL processing. Metal of the dummy metal pattern occupies from about 40% to about 90% of the surface area of any given dummy metal pattern region. High dummy metal surface coverage, in conjunction with utilization of slotted conductive pads, allows for improved planarization of wafer surfaces presented for hybrid bonding. Planarized wafers exhibit minimum topographic differentials corresponding to step height differences of less than about 400 Å. Planarized first and second wafers are aligned and subsequently hybrid bonded with application of heat and pressure; dielectric-to-dielectric, RDL-to-RDL. Lithography controls to realize WEE from about 0.5 mm to about 1.5 mm may also be employed to promote topographic uniformity at wafer edges. Improved planarity of wafers presented for hybrid bonding results in improved bond uniformity for 3DIC devices formed thereby.
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公开(公告)号：US20150333093A1
公开(公告)日：2015-11-19
申请号：US14278941
申请日：2014-05-15
发明人： Shyh-Fann Ting , Feng-Chi Hung , Jhy-Jyi Sze , Ching-Chun Wang , Dun-Nian Yaung
IPC分类号： H01L27/146
CPC分类号： H01L27/1469 , H01L27/1462 , H01L27/14623 , H01L27/14634 , H01L27/14636 , H01L27/1464 , H01L27/14685
摘要： Presented herein is a device comprising an image sensor having a plurality of pixels disposed in a substrate and configured to sense light through a back side of the substrate and an RDL disposed on a front side of the substrate and having a plurality of conductive elements disposed in one or more dielectric layers. A sensor shield is disposed over the back side of the substrate and extending over the image sensor. At least one via contacts the sensor shield and extends from the sensor shield through at least a portion of the RDL and contacts at least one of the plurality of conductive elements.
摘要翻译： 这里提供的是一种装置，其包括图像传感器，该图像传感器具有设置在基板中的多个像素，并被配置为感测通过基板的背面的光，以及设置在基板的前侧上的RDL，并且具有多个导电元件 一个或多个电介质层。 传感器屏蔽层设置在基板的背面上并延伸到图像传感器上。 至少一个通孔接触传感器屏蔽，并从传感器屏蔽穿过RDL的至少一部分并与多个导电元件中的至少一个接触。
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公开(公告)号：US08866250B2
公开(公告)日：2014-10-21
申请号：US13789820
申请日：2013-03-08
发明人： Shyh-Fann Ting , Ching-Chun Wang
IPC分类号： H01L27/146 , H01L21/00
CPC分类号： H01L27/14623 , H01L27/14621 , H01L27/14627 , H01L27/14636 , H01L27/1464 , H01L27/14685
摘要： A device includes a semiconductor substrate, a black reference circuit in the semiconductor substrate, a metal pad on a front side of, and underlying, the semiconductor substrate, and a first and a second conductive layer. The first conductive layer includes a first portion penetrating through the semiconductor substrate to connect to the metal pad, and a second portion forming a metal shield on a backside of the semiconductor substrate. The metal shield is aligned to the black reference circuit, and the first portion and the second portion are interconnected to form a continuous region. The second conductive layer includes a portion over and contacting the first portion of the first conductive layer, wherein the first portion of the first conductive layer and the portion of the second conductive layer form a first metal pad. A dielectric layer is overlying and contacting the second portion of the first conductive layer.
摘要翻译： 一种器件包括半导体衬底，半导体衬底中的黑色参考电路，半导体衬底的正面和下方的金属焊盘以及第一和第二导电层。 第一导电层包括穿透半导体衬底以连接到金属焊盘的第一部分和在半导体衬底的背面上形成金属屏蔽的第二部分。 金属屏蔽件与黑色参考电路对准，并且第一部分和第二部分互连以形成连续区域。 第二导电层包括在第一导电层的第一部分之上并与其接触的部分，其中第一导电层的第一部分和第二导电层的部分形成第一金属焊盘。 电介质层覆盖并接触第一导电层的第二部分。
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公开(公告)号：US11948949B2
公开(公告)日：2024-04-02
申请号：US17865623
申请日：2022-07-15
发明人： Chun-Yuan Chen , Ching-Chun Wang , Hsiao-Hui Tseng , Jen-Cheng Liu , Jhy-Jyi Sze , Shyh-Fann Ting , Wei Chuang Wu , Yen-Ting Chiang , Chia Ching Liao , Yen-Yu Chen
IPC分类号： H01L27/146 , H01L29/423
CPC分类号： H01L27/14614 , H01L27/14621 , H01L27/14627 , H01L27/14636 , H01L27/1464 , H01L27/14645 , H01L27/14689 , H01L29/4236 , H01L29/42376
摘要： In some embodiments, the present disclosure relates to a device having a semiconductor substrate including a frontside and a backside. On the frontside of the semiconductor substrate are a first source/drain region and a second source/drain region. A gate electrode is arranged on the frontside of the semiconductor substrate and includes a horizontal portion, a first vertical portion, and a second vertical portion. The horizontal portion is arranged over the frontside of the semiconductor substrate and between the first and second source/drain regions. The first vertical portion extends from the frontside towards the backside of the semiconductor substrate and contacts the horizontal portion of the gate electrode structure. The second vertical portion extends from the frontside towards the backside of the semiconductor substrate, contacts the horizontal portion of the gate electrode structure, and is separated from the first vertical portion by a channel region of the substrate.
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公开(公告)号：US11728366B2
公开(公告)日：2023-08-15
申请号：US17519784
申请日：2021-11-05
发明人： Chun-Yuan Chen , Ching-Chun Wang , Dun-Nian Yaung , Hsiao-Hui Tseng , Jhy-Jyi Sze , Shyh-Fann Ting , Tzu-Jui Wang , Yen-Ting Chiang , Yu-Jen Wang , Yuichiro Yamashita
IPC分类号： H01L27/146
CPC分类号： H01L27/1463 , H01L27/1464 , H01L27/14643 , H01L27/14689 , H01L27/14609 , H01L27/14621 , H01L27/14627
摘要： The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes an image sensor disposed within a substrate. The substrate has sidewalls and a horizontally extending surface defining one or more trenches extending from a first surface of the substrate to within the substrate. One or more isolation structures are arranged within the one or more trenches. A doped region is arranged within the substrate laterally between sidewalls of the one or more isolation structures and the image sensor and vertically between the image sensor and the first surface of the substrate. The doped region has a higher concentration of a first dopant type than an abutting part of the substrate that extends along opposing sides of the image sensor.
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公开(公告)号：US11705474B2
公开(公告)日：2023-07-18
申请号：US17350409
申请日：2021-06-17
发明人： Yen-Ting Chiang , Ching-Chun Wang , Dun-Nian Yaung , Jen-Cheng Liu , Jhy-Jyi Sze , Shyh-Fann Ting , Yimin Huang
IPC分类号： H01L27/146
CPC分类号： H01L27/14649 , H01L27/14629 , H01L27/14636 , H01L27/14683
摘要： The problem of reducing noise in image sensing devices, especially NIR detectors, is solved by providing ground connections for the reflectors. The reflectors may be grounded through vias that couple the reflectors to grounded areas of the substrate. The grounded areas of the substrate may be P+ doped areas formed proximate the surface of the substrate. In particular, the P+ doped areas may be parts of photodiodes. Alternatively, the reflectors may be grounded through a metal interconnect structure formed over the front side of the substrate.
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