公开(公告)号：US20240363714A1

公开(公告)日：2024-10-31

申请号：US18767188

申请日：2024-07-09

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Kuan-Hao CHENG ,  Wei-Yang LEE ,  Tzu-Hua CHIU ,  Wei-Han FAN ,  Po-Yu LIN ,  Chia-Pin LIN

IPC分类号： H01L29/423 ,  H01L29/06 ,  H01L29/66 ,  H01L29/786

CPC分类号： H01L29/42392 ,  H01L29/0673 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/66787 ,  H01L29/78618 ,  H01L29/78696

摘要： A semiconductor structure is provided. The semiconductor structure includes a first nanostructure stacked over and spaced apart from a second nanostructure, a gate stack wrapping around the first nanostructure and the second nanostructure, a source/drain feature adjoining the first nanostructure and the second nanostructure, and a first inner spacer layer interposing the gate stack and the source/drain feature and interposing the first nanostructure and the second nanostructure. A dopant in the source/drain feature has a first concentration at an interface between the first inner spacer layer and the source/drain feature and a second concentration at a first distance away from the interface. The first concentration is higher than the second concentration.

公开(公告)号：US20240274649A1

公开(公告)日：2024-08-15

申请号：US18644270

申请日：2024-04-24

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Ting-Yeh CHEN ,  Wei-Yang LEE ,  Chia-Pin LIN ,  Yuan-Ching PENG

IPC分类号： H01L23/64 ,  H01L27/08 ,  H01L29/06

CPC分类号： H01L28/20 ,  H01L23/647 ,  H01L27/0802 ,  H01L29/0649

摘要： In a method of manufacturing a semiconductor device, a fin structure, which includes a stacked layer of first semiconductor layers and second semiconductor layers disposed over a bottom fin structure and a hard mask layer over the stacked layer, is formed. An isolation insulating layer is formed. A sacrificial cladding layer is formed over at least sidewalls of the exposed hard mask layer and stacked layer. A first dielectric layer is formed. A second dielectric layer is formed over the first dielectric layer. The second dielectric layer is recessed. A third dielectric layer is formed on the recessed second dielectric layer. The third dielectric layer is partially removed to form a trench. A fourth dielectric layer is formed by filling the trench with a dielectric material, thereby forming a wall fin structure.

公开(公告)号：US20240153824A1

公开(公告)日：2024-05-09

申请号：US18188010

申请日：2023-03-22

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Ting-Yeh CHEN ,  Wei-Yang LEE ,  Po-Cheng WANG ,  De-Fang CHEN ,  Chao-Cheng CHEN

IPC分类号： H01L21/8234 ,  H01L27/088

CPC分类号： H01L21/823468 ,  H01L21/823418 ,  H01L27/088

摘要： A method includes forming a stack of channel layers and sacrificial layers over a substrate, patterning the stack to form a fin-shape structure, and recessing a portion of the fin-shape structure to form a recess. A top surface of the substrate under the recess is covered at least by a bottommost sacrificial layer of the stack. The method also includes forming inner spacers on terminal ends of the sacrificial layers that are above the bottommost sacrificial layer, depositing an undoped layer in the recess, and forming a doped epitaxial feature over the undoped layer. The undoped layer covers terminal ends of a bottommost channel layer of the stack. The doped epitaxial feature covers terminal ends of the channel layers that are above the bottommost channel layer.

公开(公告)号：US20240113201A1

公开(公告)日：2024-04-04

申请号：US18159625

申请日：2023-01-25

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chih-Ching WANG ,  Wei-Yang LEE ,  Bo-Yu LAI ,  Chung-I YANG ,  Sung-En LIN

IPC分类号： H01L29/66 ,  H01L29/06 ,  H01L29/423 ,  H01L29/775

CPC分类号： H01L29/66553 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/775

摘要： Methods and structures for modulating an inner spacer profile include providing a fin having an epitaxial layer stack including a plurality of semiconductor channel layers interposed by a plurality of dummy layers. In some embodiments, the method further includes removing the plurality of dummy layers to form a first gap between adjacent semiconductor channel layers of the plurality of semiconductor channel layers. Thereafter, in some examples, the method includes conformally depositing a dielectric layer to substantially fill the first gap between the adjacent semiconductor channel layers. In some cases, the method further includes etching exposed lateral surfaces of the dielectric layer to form an etched-back dielectric layer that defines substantially V-shaped recesses. In some embodiments, the method further includes forming a substantially V-shaped inner spacer within the substantially V-shaped recesses.

公开(公告)号：US20240038866A1

公开(公告)日：2024-02-01

申请号：US17875975

申请日：2022-07-28

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chih-Ching WANG ,  Chung-I YANG ,  Wei-Yang LEE ,  Wen-Hsing HSIEH

IPC分类号： H01L29/423 ,  H01L29/06 ,  H01L29/786 ,  H01L29/417 ,  H01L29/66

CPC分类号： H01L29/42392 ,  H01L29/0673 ,  H01L29/78696 ,  H01L29/41775 ,  H01L29/66553 ,  H01L29/66545 ,  H01L29/6656

摘要： A method for forming a semiconductor device structure is provided. The method includes providing a substrate. The method includes forming a nanostructure stack over the substrate. The method includes forming a gate stack over the nanostructure stack and the substrate. The method includes removing the first nanostructure forming a first gap between the substrate and the second nanostructure. The method includes forming a first spacer layer in the first gap and a gate spacer over a sidewall of the gate stack. The method includes partially removing the nanostructure stack, which is not covered by the gate stack and the gate spacer, to form a first trench in the nanostructure stack. The method includes forming a source/drain structure in the first trench and over the first spacer layer.

公开(公告)号：US20230352594A1

公开(公告)日：2023-11-02

申请号：US17732552

申请日：2022-04-29

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Yen-Sheng LU ,  Chung-Chi WEN ,  Yen-Ting CHEN ,  Wei-Yang LEE ,  Chia-Pin LIN ,  Chih-Chiang CHANG ,  Chien-I KUO ,  Yuan-Ching PENG ,  Chih-Ching WANG ,  Wen-Hsing Hsieh ,  Chii-Horng LI ,  Yee-Chia YEO

IPC分类号： H01L29/786 ,  H01L29/06 ,  H01L29/423 ,  H01L21/02 ,  H01L29/66

CPC分类号： H01L29/78618 ,  H01L29/0665 ,  H01L29/42392 ,  H01L29/78696 ,  H01L21/0259 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/66742

摘要： Various embodiments of the present disclosure provide a semiconductor device structure. In one embodiment, the semiconductor device structure includes a source/drain feature over a substrate, a plurality of semiconductor layers over the substrate, a gate electrode layer surrounding a portion of each of the plurality of the semiconductor layers, a gate dielectric layer in contact with the gate electrode layer, and a cap layer. The cap layer has a first portion disposed between the plurality of semiconductor layers and the source/drain feature and a second portion extending outwardly from opposing ends of the first portion. The semiconductor device structure further includes a dielectric spacer disposed between and in contact with the source/drain feature and the second portion of the cap layer.

公开(公告)号：US20230231014A1

公开(公告)日：2023-07-20

申请号：US17579833

申请日：2022-01-20

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chien-Wei LEE ,  Yen-Ting CHEN ,  Wei-Yang LEE ,  Chia-Pin LIN

IPC分类号： H01L29/06 ,  H01L29/423 ,  H01L29/786 ,  H01L21/8234

CPC分类号： H01L29/0665 ,  H01L29/42392 ,  H01L29/78618 ,  H01L29/78696 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823481 ,  H01L29/0649

摘要： A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a base and a fin structure over the base. The semiconductor device structure includes an isolation structure over the base and surrounding a lower portion of the fin structure. The semiconductor device structure includes a gate stack wrapped around an upper portion of the fin structure. The semiconductor device structure includes a source/drain structure partially embedded in the isolation structure and the lower portion of the fin structure. The source/drain structure has an undoped semiconductor layer and a first doped layer over the undoped semiconductor layer, and the undoped semiconductor layer separates the first doped layer from the isolation structure.

公开(公告)号：US20230010717A1

公开(公告)日：2023-01-12

申请号：US17370824

申请日：2021-07-08

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Po-Cheng WANG ,  Ting-Yeh CHEN ,  De-Fang CHEN ,  Wei-Yang LEE

IPC分类号： H01L29/423 ,  H01L29/786 ,  H01L29/06 ,  H01L29/417 ,  H01L29/66 ,  H01L29/40

摘要： A semiconductor device structure and a method for forming a semiconductor device structure are provided. The semiconductor device structure includes a stack of channel structures over a semiconductor fin and a gate stack wrapped around the channel structures. The semiconductor device structure also includes a source/drain epitaxial structure adjacent to the channel structures and multiple inner spacers. Each of the inner spacers is between the gate stack and the source/drain epitaxial structure. The semiconductor device structure further includes an isolation structure between the semiconductor fin and the source/drain epitaxial structure.

公开(公告)号：US20220416035A1

公开(公告)日：2022-12-29

申请号：US17357052

申请日：2021-06-24

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Feng-Ching CHU ,  Wei-Yang LEE ,  Chia-Pin LIN

IPC分类号： H01L29/417 ,  H01L21/84 ,  H01L29/66 ,  H01L27/12

摘要： A semiconductor device structure and a formation method are provided. The semiconductor device structure includes a stack of channel structures and includes a first epitaxial structure and a second epitaxial structure adjacent to opposite sides of the channel structures. The semiconductor device structure also includes a gate stack wrapped around each of the channel structures and a backside conductive contact connected to the second epitaxial structure. The second epitaxial structure is between a top of the backside conductive contact and a top of the gate stack. The semiconductor device structure further includes a dielectric fin stacked over an isolation structure. The dielectric fin is adjacent to the second epitaxial structure, and the isolation structure is adjacent to the backside conductive contact. The isolation structure has a first height, the dielectric fin has a second height, and the second height is greater than the first height.

公开(公告)号：US20170256639A1

公开(公告)日：2017-09-07

申请号：US15393812

申请日：2016-12-29

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Wei-Yang LEE ,  Feng-Cheng YANG ,  Ting-Yeh CHEN

IPC分类号： H01L29/78 ,  H01L29/66 ,  H01L21/762 ,  H01L29/06

CPC分类号： H01L29/66795 ,  H01L21/762 ,  H01L29/0649 ,  H01L29/785 ,  Y02E10/50

摘要： A semiconductor device includes an isolation layer disposed over a substrate, first and second fin structures, a gate structure, a source/drain structure. The first fin structure and the second fin structure are both disposed over the substrate, and extend in a first direction in plan view. The gate structure is disposed over parts of the first and second fin structures, and extends in a second direction crossing the first direction in plan view. A first void is formed in the source/drain structure.