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    Semiconductor arrangement with capacitor
    1.
    发明授权
    Semiconductor arrangement with capacitor 有权

    公开(公告)号：US11011524B2

    公开(公告)日：2021-05-18

    申请号：US16014008

    申请日：2018-06-21

    申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED

    发明人： Chern-Yow Hsu ,  Chen-Jong Wang ,  Chia-Shiung Tsai ,  Shih-Chang Liu ,  Xiaomeng Chen

    IPC分类号： H01L27/108 ,  H01L49/02 ,  H01L21/768

    摘要： A semiconductor arrangement includes a logic region and a memory region. The memory region has an active region that includes a semiconductor device. The memory region also has a capacitor within one or more dielectric layers over the active region, where the capacitor is over the semiconductor device. The semiconductor arrangement also includes a protective ring within at least one of the logic region or the memory region and that separates the logic region from the memory region. The capacitor has a first electrode, a second electrode and an insulating layer between the first electrode and the second electrode, where the first electrode is substantially larger than other portions of the capacitor.

    SEMICONDUCTOR ARRANGMENT WITH CAPACITOR
    5.
    发明申请
    SEMICONDUCTOR ARRANGMENT WITH CAPACITOR 有权
    电容器与电容器的配置

    公开(公告)号：US20150145100A1

    公开(公告)日：2015-05-28

    申请号：US14087005

    申请日：2013-11-22

    申请人： Taiwan Semiconductor Manufacturing Company Limited

    发明人： Chern-Yow Hsu ,  Shih-Chang Liu ,  Chia-Shiung Tsai ,  Xiaomeng Chen ,  Chen-Jong Wang

    IPC分类号： H01L27/108

    CPC分类号： H01L27/10894 ,  H01L21/76877 ,  H01L27/10814 ,  H01L27/1085 ,  H01L27/10897 ,  H01L28/90

    摘要： A semiconductor arrangement includes a logic region and a memory region. The memory region has an active region that includes a semiconductor device. The memory region also has a capacitor within one or more dielectric layers over the active region, where the capacitor is over the semiconductor device. The semiconductor arrangement also includes a protective ring within at least one of the logic region or the memory region and that separates the logic region from the memory region. The capacitor has a first electrode, a second electrode and an insulating layer between the first electrode and the second electrode, where the first electrode is substantially larger than other portions of the capacitor.

    摘要翻译： 半导体装置包括逻辑区和存储区。 存储区具有包括半导体器件的有源区。 存储区域还在有源区域上的一个或多个电介质层内具有电容器，其中电容器在半导体器件上方。 半导体装置还包括至少一个逻辑区域或存储区域内的保护环，并且将逻辑区域与存储区域分开。 电容器在第一电极和第二电极之间具有第一电极，第二电极和绝缘层，其中第一电极基本上大于电容器的其它部分。

    SEMICONDUCTOR ARRANGEMENT WITH CAPACITOR
    7.
    发明申请
    SEMICONDUCTOR ARRANGEMENT WITH CAPACITOR 有权

    公开(公告)号：US20210272964A1

    公开(公告)日：2021-09-02

    申请号：US17321590

    申请日：2021-05-17

    申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED

    发明人： Chern-Yow Hsu ,  Chen-Jong Wang ,  Chia-Shiung Tsai ,  Shih-Chang Liu ,  Xiaomeng Chen

    IPC分类号： H01L27/108 ,  H01L49/02 ,  H01L21/768

    摘要： A semiconductor arrangement includes a logic region and a memory region. The memory region has an active region that includes a semiconductor device. The memory region also has a capacitor within one or more dielectric layers over the active region, where the capacitor is over the semiconductor device. The semiconductor arrangement also includes a protective ring within at least one of the logic region or the memory region and that separates the logic region from the memory region. The capacitor has a first electrode, a second electrode and an insulating layer between the first electrode and the second electrode, where the first electrode is substantially larger than other portions of the capacitor.