SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING

    公开(公告)号:US20220336303A1

    公开(公告)日:2022-10-20

    申请号:US17857993

    申请日:2022-07-05

    摘要: A method of forming a semiconductor package device includes: providing a substrate; bonding a first die to an upper surface of the substrate through a bonding layer; bonding a second die to the upper surface of the substrate through the bonding layer, the second die laterally separated from the first die; depositing an insulation material between the first die and the second die and filling a gap measured between sidewalk of the first die and the second die; forming a first interconnect layer over the first die and the second die to form the semiconductor package device; and performing a testing operation on semiconductor package device with the substrate in place. A Young's modulus of the substrate is greater than that of the insulation material.

    SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD OF THE SAME

    公开(公告)号:US20220216146A1

    公开(公告)日:2022-07-07

    申请号:US17698693

    申请日:2022-03-18

    摘要: The present disclosure provides a semiconductor package, including a first semiconductor structure, including an active region in a first substrate portion, wherein the active region includes at least one of a transistor, a diode, and a photodiode, a first bonding metallization over the first semiconductor structure, a first bonding dielectric over the first semiconductor structure, surrounding and directly contacting the first bonding metallization, a second semiconductor structure over a first portion of the first semiconductor structure, wherein the second semiconductor structure includes a conductive through silicon via, a second bonding dielectric at a back surface of the second semiconductor structure, a second bonding metallization surrounded by the second bonding dielectric and directly contacting the second bonding dielectric, and a conductive through via over a second portion of the first semiconductor structure different from the first portion.

    SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME

    公开(公告)号:US20210280544A1

    公开(公告)日:2021-09-09

    申请号:US17327405

    申请日:2021-05-21

    IPC分类号: H01L23/00

    摘要: A semiconductor structure includes a first substrate, a plurality of first bonding pads disposed in the first dielectric layer, a plurality of second bonding pads disposed in the first dielectric layer, a second substrate, and a dielectric layer between the first substrate and the second substrate. The first bonding pads have a first width, and the second bonding pads have a second width greater than the first width. The second width is greater than the first width. The second bonding pads are arranged to form a frame pattern surrounding the first bonding pads. The first bonding pads and the second bonding pads are arranged to form a plurality of columns and a plurality of rows. Two of the second bonding pads are disposed at two opposite ends of each column and two opposite ends of each row.

    SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF

    公开(公告)号:US20210217710A1

    公开(公告)日:2021-07-15

    申请号:US17217919

    申请日:2021-03-30

    摘要: A semiconductor structure includes a first substrate; a second substrate, disposed over the first substrate; a die, disposed over the second substrate; a via, extending through the second substrate and electrically connecting to the die; a redistribution layer (RDL) disposed between the first substrate and the second substrate, including a dielectric layer, a first conductive structure electrically connecting to the via, and a second conductive structure laterally surrounding the first conductive structure; and an underfill material, partially surrounding the RDL, wherein one end of the second conductive structure exposed through the dielectric layer is entirely in contact with the underfill material.

    METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTURE

    公开(公告)号:US20220208725A1

    公开(公告)日:2022-06-30

    申请号:US17696591

    申请日:2022-03-16

    摘要: A method of manufacturing a semiconductor structure includes following operations. A substrate is provided. A first die is disposed over the substrate. A second die is provided. The second die includes a via extended within the second die. The second die is disposed over the substrate. A molding is formed around the first die and second die. An interconnect structure is formed. The interconnect structure includes a dielectric layer and a conductive member. The dielectric layer is disposed over the molding, the first die and the second die. The conductive member is surrounded by the dielectric layer. The via is formed by removing a portion of the second die to form a recess extended within the second die and disposing a conductive material into the recess.