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公开(公告)号：US20200152610A1
公开(公告)日：2020-05-14
申请号：US16742285
申请日：2020-01-14
发明人： JING-CHENG LIN , YING-CHING SHIH , PU WANG , CHEN-HUA YU
IPC分类号： H01L25/065 , H01L25/00 , H01L23/00 , H01L23/48 , H01L23/31 , H01L21/768 , H01L21/683 , H01L21/56 , H01L25/10
摘要： Some embodiments of the present disclosure provide a semiconductor device. The semiconductor device includes: a bottom package; wherein an area of a contact surface between the conductor and the through via substantially equals a cross-sectional area of the through via, and the bottom package includes: a molding compound; a through via penetrating through the molding compound; a die molded in the molding compound; and a conductor on the through via. An associated method of manufacturing the semiconductor device is also disclosed.
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公开(公告)号：US20190115313A1
公开(公告)日：2019-04-18
申请号：US16229585
申请日：2018-12-21
发明人： ALEXANDER KALNITSKY , YI-YANG LEI , HSI-CHING WANG , CHENG-YU KUO , TSUNG LUNG HUANG , CHING-HUA HSIEH , CHUNG-SHI LIU , CHEN-HUA YU , CHIN-YU KU , DE-DUI LIAO , KUO-CHIO LIU , KAI-DI WU , KUO-PIN CHANG , SHENG-PIN YANG , ISAAC HUANG
IPC分类号： H01L23/00 , H01L21/78 , H01L21/683
CPC分类号： H01L24/83 , H01L21/6835 , H01L21/78 , H01L24/03 , H01L24/73 , H01L24/92 , H01L24/94 , H01L2221/68318 , H01L2221/68327 , H01L2221/6834 , H01L2224/03002 , H01L2224/0401 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/06181 , H01L2224/131 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/2919 , H01L2224/73204 , H01L2224/83201 , H01L2224/8385 , H01L2224/921 , H01L2224/94 , H01L2924/06 , H01L2924/07025 , H01L2224/03 , H01L2924/00014 , H01L2924/014
摘要： A method of manufacturing a semiconductor structure includes receiving a first substrate including an IMD layer disposed over the first substrate and a plurality of conductive bumps disposed in the IMD layer; receiving a second substrate; disposing a patterned adhesive over the first substrate, wherein at least a portion of the IMD layer is exposed through the patterned adhesive; and bonding the first substrate with the second substrate, wherein a top surface of the at least portion of the IMD layer is exposed through the patterned adhesive after bonding the first substrate with the second substrate.
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公开(公告)号：US20180350752A1
公开(公告)日：2018-12-06
申请号：US16056021
申请日：2018-08-06
发明人： CHUEI-TANG WANG , VINCENT CHEN , TZU-CHUN TANG , CHEN-HUA YU , CHING-FENG YANG , MING-KAI LIU , YEN-PING WANG , KAI-CHIANG WU , SHOU ZEN CHANG , WEI-TING LIN , CHUN-LIN LU
IPC分类号： H01L23/552 , H01L25/00 , H01L23/528 , H01L23/58 , H01L23/00 , H01L21/78 , H01L25/065 , H01L23/31
摘要： A semiconductor device includes a semiconductor die, an insulative layer, a plurality of conductive features, a dummy redistribution layer (RDL), and an Electromagnetic Interference (EMI) shield. The insulative layer covers the semiconductor die. The conductive features substantially surround the insulative layer. The dummy RDL is over the insulative layer and electrically disconnected from the semiconductor die. The EMI shield is in contact with the plurality of conductive features and the dummy RDL.
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公开(公告)号：US20180151501A1
公开(公告)日：2018-05-31
申请号：US15459691
申请日：2017-03-15
发明人： CHEN-HUA YU , KAI-CHIANG WU , CHUN-LIN LU
IPC分类号： H01L23/538 , H01L23/31 , H01L25/065 , H01L25/00
摘要： A semiconductor structure includes a first die; a first molding encapsulating the first die; a second die disposed over the first molding, and including a first surface, a second surface opposite to the first surface, and a sidewall between the first surface and the second surface; and a second molding disposed over the first molding and surrounding the second die, wherein the first surface of the second die faces the first molding, and the second die is at least partially covered by the second molding.
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公开(公告)号：US20170345798A1
公开(公告)日：2017-11-30
申请号：US15679692
申请日：2017-08-17
发明人： CHEN-HUA YU , MING-FA CHEN , SUNG-FENG YEH
IPC分类号： H01L25/065 , H01L21/683 , H01L23/00 , H01L25/00 , H01L21/768 , H01L23/48
CPC分类号： H01L25/0657 , H01L21/6835 , H01L21/76898 , H01L23/481 , H01L24/83 , H01L25/0655 , H01L25/072 , H01L25/165 , H01L25/50 , H01L2221/68327 , H01L2224/838 , H01L2224/83801 , H01L2224/83805 , H01L2224/83895 , H01L2224/83896 , H01L2225/06541 , H01L2225/06548 , H01L2225/06572
摘要： A semiconductor structure includes: a first semiconductor workpiece; a second semiconductor workpiece, bonded to a first surface of the first semiconductor workpiece, wherein the second semiconductor workpiece includes two adjacent semiconductor dies; a dielectric material, disposed between the two adjacent semiconductor dies; a first electrically conductive via, formed in the dielectric material and extended to electrically connect the first semiconductor workpiece; a third semiconductor workpiece, bonded to a second surface of the first semiconductor workpiece, the second surface being opposite to the first surface; and a second electrically conductive via, extended into the first semiconductor workpiece and substantially aligned with the first electrically conductive via such that the first electrically conductive via connects the second electrically conductive via.
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公开(公告)号：US20170170145A1
公开(公告)日：2017-06-15
申请号：US14968517
申请日：2015-12-14
发明人： CHEN-HUA YU , CHI-HSI WU , DER-CHYANG YEH , HSIEN-WEI CHEN , AN-JHIH SU , TIEN-CHUNG YANG
IPC分类号： H01L25/065 , H01L25/00
摘要： A semiconductor structure includes a first die, a second die horizontally disposed adjacent to the first die, a third die disposed over the first die and the second die, and a first dielectric material surrounding the first die and the second die, wherein a portion of the first dielectric material is disposed between the first die and the second die, and the third die is disposed over the portion of the dielectric.
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公开(公告)号：US20160365332A1
公开(公告)日：2016-12-15
申请号：US14738109
申请日：2015-06-12
发明人： ALEXANDER KALNITSKY , YI-YANG LEI , HSI-CHING WANG , CHENG-YU KUO , TSUNG LUNG HUANG , CHING-HUA HSIEH , CHUNG-SHI LIU , CHEN-HUA YU , CHIN-YU KU , DE-DUI LIAO , KUO-CHIO LIU , KAI-DI WU , KUO-PIN CHANG , SHENG-PIN YANG , ISAAC HUANG
CPC分类号： H01L24/83 , H01L21/6835 , H01L21/78 , H01L24/03 , H01L24/73 , H01L24/92 , H01L24/94 , H01L2221/68318 , H01L2221/68327 , H01L2221/6834 , H01L2224/03002 , H01L2224/0401 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/06181 , H01L2224/131 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/2919 , H01L2224/73204 , H01L2224/83201 , H01L2224/8385 , H01L2224/921 , H01L2224/94 , H01L2924/06 , H01L2924/07025 , H01L2224/03 , H01L2924/00014 , H01L2924/014
摘要： A method of manufacturing a semiconductor structure, comprising: receiving a first substrate including a first surface, a second surface opposite to the first surface and a plurality of conductive bumps disposed over the first surface; receiving a second substrate; disposing an adhesive over the first substrate or the second substrate; heating the adhesive in a first ambiance; bonding the first substrate with the second substrate by applying a force of less than about 10,000N upon the first substrate or the second substrate and heating the adhesive in a second ambiance; and thinning down a thickness of the first substrate from the second surface.
摘要翻译： 一种制造半导体结构的方法，包括：接收包括第一表面，与第一表面相对的第二表面的第一基板和设置在第一表面上的多个导电凸块; 接收第二基板; 在所述第一基板或所述第二基板上设置粘合剂; 以第一种氛围加热粘合剂; 通过在第一基板或第二基板上施加小于约10,000N的力将第一基板与第二基板接合并以第二氛围加热粘合剂; 以及从所述第二表面减薄所述第一基板的厚度。
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公开(公告)号：US20200303301A1
公开(公告)日：2020-09-24
申请号：US16900640
申请日：2020-06-12
发明人： MING-FA CHEN , SUNG-FENG YEH , CHEN-HUA YU
IPC分类号： H01L23/522 , H01L21/768 , H01L23/528 , H01L23/00 , H01L25/065 , H01L25/16 , H01L25/00
摘要： The present disclosure provides a semiconductor package, including a first semiconductor structure, including an active region in a first substrate portion, wherein the active region includes at least one of a transistor, a diode, and a photodiode, a first bonding metallization over the first semiconductor structure, a first bonding dielectric over the first semiconductor structure, surrounding and directly contacting the first bonding metallization, a second semiconductor structure over a first portion of the first semiconductor structure, a second bonding metallization at a front surface of the second semiconductor structure, a second bonding dielectric surrounding and directly contacting the second bonding metallization, a conductive through via over a second portion of the first semiconductor structure different from the first portion, and a passive device directly over the conductive through via.
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公开(公告)号：US20190237553A1
公开(公告)日：2019-08-01
申请号：US16379442
申请日：2019-04-09
发明人： CHEN-HUA YU , MIRNG-JI LII , HUNG-YI KUO , HAO-YI TSAI , TSUNG-YUAN YU , MIN-CHIEN HSIAO , CHAO-WEN SHIH
IPC分类号： H01L29/40 , H01L23/522 , H01L21/765
CPC分类号： H01L29/402 , H01L21/765 , H01L23/5223 , H01L23/5227 , H01L23/525 , H01L23/562 , H01L24/05 , H01L2224/0401 , H01L2224/05022 , H01L2224/05548 , H01L2224/05567 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05684 , H01L2224/10126 , H01L2924/00014
摘要： The present disclosure provides a semiconductor structure. The semiconductor structure includes a circuit region, a seal ring region and an assembly isolation region. The circuit region includes a first conductive layer. The seal ring region includes a second conductive layer. The assembly isolation region is between the circuit region and the seal ring region. The first conductive layer and the second conductive layer respectively include a portion extending into the assembly isolation region thereby forming an electric component in the assembly isolation region.
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公开(公告)号：US20190067222A1
公开(公告)日：2019-02-28
申请号：US16173450
申请日：2018-10-29
发明人： VINCENT CHEN , HUNG-YI KUO , CHUEI-TANG WANG , HAO-YI TSAI , CHEN-HUA YU , WEI-TING CHEN , MING HUNG TSENG , YEN-LIANG LIN
IPC分类号： H01L23/66
摘要： A method of manufacturing a semiconductor structure includes providing a transceiver, forming a molding to surround the transceiver, forming a plurality of recesses extending through the molding, disposing a conductive material into the plurality of recesses to form a plurality of vias, disposing and patterning an insulating layer over the molding, the plurality of vias and the transceiver, and forming a redistribution layer (RDL) over the insulating layer, wherein the RDL comprises an antenna disposed over the insulating layer and a dielectric layer covering the antenna, and a portion of the antenna is extended through the insulating layer and is electrically connected with the transceiver.
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