公开(公告)号：US20210087056A1

公开(公告)日：2021-03-25

申请号：US16583111

申请日：2019-09-25

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： KANG-CHE HUANG ,  YI-CHIEN WU ,  SHIANG-CHI LIN ,  JUNG-HUEI PENG ,  CHUN-WEN CHENG

IPC: B81C1/00

Abstract: A method for manufacturing a MEMS structure is provided. The method includes providing a MEMS substrate having a first surface, forming a first buffer layer on the first surface of the MEMS substrate, and forming a first roughening layer on the first buffer layer. Also, a MEMS structure is provided. The MEMS structure includes a MEMS substrate, a first buffer layer, a first roughening layer, and a CMOS substrate. The MEMS substrate has a first surface and a pillar is on the first surface. The first buffer layer is on the first surface. The first roughening layer is on the first buffer layer. The CMOS substrate has a second surface and is bonded to the MEMS substrate via the pillar. Moreover, an air gap is between the first roughening layer and the second surface of the CMOS substrate.

公开(公告)号：US20170313574A1

公开(公告)日：2017-11-02

申请号：US15142806

申请日：2016-04-29

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： YUAN-CHIH HSIEH ,  HSING-LIEN LIN ,  JUNG-HUEI PENG ,  YI-CHIEN WU

IPC: B81B3/00 ,  B81C1/00

CPC classification number: B81B3/0005 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2203/04

Abstract: The present disclosure provides a method of manufacturing a structure. The method comprises: providing a first substrate; forming a plurality of conductive pads over the first substrate; forming a film on a first subset of the plurality of conductive pads, thereby leaving a second subset of the plurality of conductive pads exposed from the film; forming a self-assembled monolayer (SAM) over the film; and forming a cavity by the first substrate and a second substrate through bonding a portion of the second substrate to the second subset of the plurality of conductive pads that are exposed from the film.

公开(公告)号：US20180065841A1

公开(公告)日：2018-03-08

申请号：US15255606

申请日：2016-09-02

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： JUNG-HUEI PENG ,  YI-CHIEN WU ,  YU-CHIA LIU ,  CHUN-WEN CHENG

IPC: B81B7/00 ,  B81C1/00

CPC classification number: B81C99/0045

Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes a cavity disposed in a substrate and enclosed by a first surface and a second surface opposite to the first surface. The semiconductor structure also includes a first electrode pair having a first electrode on the first surface and a second electrode on the second surface. The first electrode pair is configured to measure a first spacing between the first surface and the second surface. The semiconductor structure further includes a second electrode pair having a third electrode on the first surface and a fourth electrode on the second surface. The second electrode pair is configured to measure a second spacing between the first surface and the second surface.