公开(公告)号：US20200058660A1

公开(公告)日：2020-02-20

申请号：US16533359

申请日：2019-08-06

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： Meng-Sheng CHANG ,  Yao-Jen YANG

IPC分类号： H01L27/112 ,  H01L23/528 ,  H01L23/525 ,  G11C17/18 ,  G06F17/50 ,  G11C17/16

摘要： A structure includes a word line, a bit line, and an anti-fuse cell. The anti-fuse cell includes a reading device, a programming device, and a dummy device. The reading device includes a first gate coupled to the first word line, a first source/drain region coupled to the bit line, and a second source/drain region. The first source/drain region and the second source/drain region are on opposite sides of the first gate. The programming device includes a second gate, a third source/drain region coupled to the second source/drain region, and a fourth source/drain region. The third source/drain region and the fourth source/drain region are on opposite sides of the second gate. The dummy device includes a third gate, a fifth source/drain region coupled to the fourth source/drain region, and a sixth source/drain region. The fifth source/drain region and the sixth source/drain region are on opposite sides of the third gate.

公开(公告)号：US20220237358A1

公开(公告)日：2022-07-28

申请号：US17342295

申请日：2021-06-08

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Yao-Jen YANG ,  Meng-Sheng CHANG

IPC分类号： G06F30/392 ,  H01L27/02 ,  H01L27/118 ,  H01L27/12

摘要： A method includes receiving a design rule deck including a predetermined set of widths and spacings associated with active regions. The method also includes providing a cell library including cells having respective active regions, wherein widths and spacings of the active regions are selected from the predetermined set of the design rule deck. The method includes placing a first cell and a second cell from the cell library in a design layout. The first cell has a cell height in a first direction, and a first active region having a first width in the first direction. The second cell has the cell height, and a second active region having a second width in the first direction. The second width is different from the first width. The method further includes manufacturing a semiconductor device according to the design layout.

公开(公告)号：US20230067140A1

公开(公告)日：2023-03-02

申请号：US17463172

申请日：2021-08-31

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Chien-Ying CHEN ,  Yao-Jen YANG

IPC分类号： H01L27/112 ,  G06F30/392

摘要： A one-time programmable (OTP) bit cell includes a substrate including a front side and a back side, an active area on the front side, a first read transistor including a first gate and a first portion of the active area intersected by the first gate, a program transistor including a second gate and a second portion of the active area intersected by the second gate, a first electrical connection to the first gate, a second electrical connection to the second gate, and a third electrical connection to the active area. At least one of the first, second, or third electrical connections includes a metal line positioned on the back side.

公开(公告)号：US20230061343A1

公开(公告)日：2023-03-02

申请号：US17412999

申请日：2021-08-26

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Chien-Ying CHEN ,  Yen-Jen CHEN ,  Yao-Jen YANG ,  Meng-Sheng CHANG ,  Chia-En HUANG

IPC分类号： H01L23/525 ,  H01L23/48 ,  H01L27/112 ,  G11C17/16

摘要： An integrated circuit includes a front-side horizontal conducting line in a first metal layer, a front-side vertical conducting line in a second metal layer, a front-side fuse element, and a backside conducting line. The front-side horizontal conducting line is directly connected to the drain terminal-conductor of a transistor through a front-side terminal via-connector. The front-side vertical conducting line is directly connected to the front-side horizontal conducting line through a front-side metal-to-metal via-connector. The front-side fuse element having a first fuse terminal conductively connected to the front-side vertical conducting line. The backside conducting line is directly connected to the source terminal-conductor of the transistor through a backside terminal via-connector.

公开(公告)号：US20220285269A1

公开(公告)日：2022-09-08

申请号：US17192265

申请日：2021-03-04

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Meng-Sheng CHANG ,  Chien-Ying CHEN ,  Yao-Jen YANG

IPC分类号： H01L23/525 ,  H01L21/768

摘要： An antifuse structure and IC devices incorporating such antifuse structures in which the antifuse structure includes an dielectric antifuse structure formed on an active area having a first dielectric antifuse electrode, a second dielectric antifuse electrode extending parallel to the first dielectric antifuse electrode, a first dielectric composition between the first dielectric antifuse electrode and the second dielectric antifuse electrode, and a first programming transistor electrically connected to a first voltage supply wherein, during a programming operation a programming voltage is selectively applied to certain of the dielectric antifuse structures to form a resistive direct electrical connection between the first dielectric antifuse electrode and the second dielectric antifuse electrode.

公开(公告)号：US20220352185A1

公开(公告)日：2022-11-03

申请号：US17393121

申请日：2021-08-03

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Hsiang-Wei LIU ,  Andy YANG ,  Yao-Jen YANG

IPC分类号： H01L27/112 ,  G11C5/02 ,  H01L23/522 ,  H01L21/768 ,  G11C17/16

摘要： An integrated circuit (IC) device includes transistor and programmable structure regions. The transistor region includes a source structure configured to receive a reference voltage, a first portion of a drain structure, and a gate electrode positioned between the source structure and the first portion of the drain structure, and configured to receive an activation signal. The programmable structure region includes a second portion of the drain structure, a first signal line configured to receive an operational voltage, a second signal line, a gate via underlying and electrically connected to the first signal line, and a drain via positioned between and electrically connected to the second portion of the drain structure and the second signal line. Portions of the first signal line including a gate via location and the second signal line including a drain via location are positioned in parallel in a same metal layer of the IC device.

公开(公告)号：US20220328505A1

公开(公告)日：2022-10-13

申请号：US17851569

申请日：2022-06-28

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Meng-Sheng CHANG ,  Yao-Jen YANG

IPC分类号： H01L27/112 ,  H01L23/528 ,  G11C17/16 ,  G11C17/18 ,  H01L23/525 ,  G06F30/392

摘要： A structure includes a word line, a bit line, and an anti-fuse cell. The anti-fuse cell includes a reading device, a programming device, and a dummy device. The reading device includes a first gate coupled to the first word line, a first source/drain region coupled to the bit line, and a second source/drain region. The first source/drain region and the second source/drain region are on opposite sides of the first gate. The programming device includes a second gate, a third source/drain region coupled to the second source/drain region, and a fourth source/drain region. The third source/drain region and the fourth source/drain region are on opposite sides of the second gate. The dummy device includes a third gate, a fifth source/drain region coupled to the fourth source/drain region, and a sixth source/drain region. The fifth source/drain region and the sixth source/drain region are on opposite sides of the third gate.

公开(公告)号：US20200075610A1

公开(公告)日：2020-03-05

申请号：US16460266

申请日：2019-07-02

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： Min-Shin WU ,  Meng-Sheng CHANG ,  Shao-Yu CHOU ,  Yao-Jen YANG

IPC分类号： H01L27/112 ,  G11C17/16 ,  G11C17/18

摘要： An IC device includes an anti-fuse device including a dielectric layer between a first gate structure and an active area, a first transistor including a second gate structure overlying the active area, and a second transistor including a third gate structure overlying the active area. The first gate structure is between the second gate structure and the third gate structure.

公开(公告)号：US20220359027A1

公开(公告)日：2022-11-10

申请号：US17815141

申请日：2022-07-26

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Meng-Sheng CHANG ,  Yao-Jen YANG

IPC分类号： G11C17/18 ,  G11C17/16 ,  H01L27/112

摘要： An integrated circuit (IC) device includes a first active region extending along a first direction, a first pair of gate regions extending across the first active region along a second direction transverse to the first direction, and a first metal layer. The first pair of gate regions and the first active region configure a first program transistor and a first read transistor sharing a common source/drain region. The first metal layer includes a first program word line pattern over and coupled to the gate region of the first program transistor, a first read word line pattern over and coupled to the gate region of the first read transistor, a first source line pattern coupled to another source/drain region of the first program transistor, and a first bit line pattern coupled to another source/drain region of the first read transistor.

公开(公告)号：US20220093196A1

公开(公告)日：2022-03-24

申请号：US17541245

申请日：2021-12-02

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Meng-Sheng CHANG ,  Yao-Jen YANG

IPC分类号： G11C17/16 ,  G11C17/18 ,  H01L23/525 ,  H01L27/02 ,  H01L27/112 ,  G06F30/392

摘要： An IC structure includes a bit line extending in a first direction, first and second pluralities of FinFETs, and a plurality of eFuses. The FinFETs of the first plurality of FinFETs alternate with the FinFETs of the second plurality of FinFETs along the bit line, each eFuse of the plurality of eFuses includes a conductive segment extending between first and second contact regions, the first contact region is electrically connected to the bit line, and the second contact region is electrically connected to each of an adjacent FinFET of the first plurality of FinFETs and an adjacent FinFET of the second plurality of FinFETs.