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公开(公告)号:US20240027860A1
公开(公告)日:2024-01-25
申请号:US17600118
申请日:2021-09-07
Inventor: Maoxia ZHU , Hongyuan XU , Woosung SON
IPC: G02F1/1368 , G02F1/1362
CPC classification number: G02F1/1368 , G02F1/136222 , G02F1/136286 , G02F1/136227
Abstract: The present disclosure provides a display panel and a display panel manufacturing method. The display panel includes a drive circuit layer, a color photoresist layer disposed on the drive circuit layer, a common electrode layer disposed on the color photoresist layer, and a pixel electrode layer disposed on the common electrode layer. The drive circuit layer is provided with a common wire, the common electrode layer is provided with a transparent electrode, the transparent electrode is electrically connected to the common wire, and the pixel electrode layer is provided with a plurality of pixel electrodes.
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公开(公告)号:US20240127761A1
公开(公告)日:2024-04-18
申请号:US17289291
申请日:2021-04-25
Inventor: Daobing HU , Guangmiao WAN , Hang WANG , Xu WANG , Cong HU , Hongyuan XU , Woosung SON
CPC classification number: G09G3/3406 , G09G3/32 , G09G2300/0842 , G09G2310/08 , G09G2320/064
Abstract: A backlight driving method and a display panel are provided. The backlight driving method provided by the present application uses pulse width modulation technology to modulate a low-level pulse width of a scan signal. By increasing a low-level pulse width to increase the pulse period, a number of high-level pulses is reduced, thereby reducing a high-level pulse time. Therefore, a time for a TFT to receive a high-level voltage is also reduced, thereby improving a stability of the TFT and also improving a problem of a threshold voltage drift of the TFT.
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公开(公告)号:US20230161209A1
公开(公告)日:2023-05-25
申请号:US17051457
申请日:2020-05-20
Inventor: Zhixiong JIANG , Sheng SUN , Yoonsung UM , Woosung SON , Meng CHEN , Wuguang LIU , Jubin LI , Zhiwei TAN , Haiyan QUAN , Kaili QU , Chuwei LIANG , Ziqi LIU , Lintao LIU , Ting LI , Sikun HAO
IPC: G02F1/1368 , G02F1/1343 , G02F1/1362 , G02F1/1335 , H01L27/12
CPC classification number: G02F1/1368 , G02F1/134309 , G02F1/136286 , G02F1/133514 , H01L27/1222
Abstract: The present disclosure provides an array substrate and a display panel including the same. The array substrate includes a plurality of pixel units. Each of the pixel units includes a main pixel electrode, a sub-pixel electrode, a first thin film transistor (TFT) electrically connected to the sub-pixel electrode, a second TFT electrically connected to the first TFT, and a third TFT electrically connected to the main pixel electrode. The first TFT includes a first channel and a first semiconductor layer. The first channel includes two or more subchannels. The first semiconductor layer includes two or more semiconductor sublayers. Each of the semiconductor sublayers is disposed in a corresponding subchannel.
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