公开(公告)号：US20040251560A1

公开(公告)日：2004-12-16

申请号：US10813393

申请日：2004-03-31

申请人： TDK Corporation

发明人： Masahiro Nakano ,  Katsuhiko Gunji ,  Yasunobu Oikawa ,  Katsuo Sato

IPC分类号： H01L021/48 ,  H01L023/48

CPC分类号： H03H9/1071 ,  H01L2224/16225 ,  H01L2224/45144 ,  H03H9/0585 ,  H03H9/059 ,  H03H9/08 ,  H01L2924/00

摘要： A basic portion layer 21 of a substrate electrode 12a connected to a projecting electrode 13 electrically and mechanically on a substrate member of ceramics. The substrate member on which the basic portion layer 21 is formed is subjected to sintering. A surface of the basic portion layer 21 in the sintered substrate member is polished. On the polished basic portion layer 21, the plating layers 22, 23 are formed, so that surface roughness of the substrate electrode 12a may be, for example, not larger than 0.1 nullmRMS. Accordingly, junction strength of an integrated circuit element mounted on a packaging substrate by a flip-chip method can be improved.

摘要翻译： 衬底电极12a的基本部分层21，电连接到突出电极13，陶瓷的基片上。 对其上形成有碱性部分层21的基材进行烧结。 研磨烧结基板部件中的基体部分层21的表面。 在抛光的基底层21上形成镀层22,23，使得基板电极12a的表面粗糙度例如可以不大于0.1μmumRMS。 因此，可以提高通过倒装芯片方法安装在封装基板上的集成电路元件的结合强度。

公开(公告)号：US20040140865A1

公开(公告)日：2004-07-22

申请号：US10670234

申请日：2003-09-26

申请人： TDK CORPORATION

发明人： Eiju Komuro ,  Masaaki Imura ,  Katsuhiko Gunji ,  Taku Takeishi ,  Roger William Whatmore ,  Joseph Edward Albert Southin

IPC分类号： H03H009/70 ,  H03H009/56

CPC分类号： H03H9/564 ,  H03H3/04 ,  H03H9/02094 ,  H03H9/02149 ,  H03H9/173 ,  H03H9/174 ,  H03H2003/0428

摘要： A thin-film piezoelectric resonator including a piezoelectric thin film having piezoelectric characteristic, and an upper electrode and a lower electrode arranged on opposite surfaces of the piezoelectric thin film for applying an excitation voltage to the piezoelectric thin film, wherein: each of the upper electrode and the lower electrode includes a resonant portion, and a lead-out portion; and the electrode thickness of at least one part of the lead-out portion in at least one of the upper electrode and the lower electrode is larger than the electrode thickness of the resonant portion formed to be continued from the lead-out portion.

摘要翻译： 包括具有压电特性的压电薄膜的薄膜压电谐振器和布置在压电薄膜的相对表面上的上电极和下电极，用于向压电薄膜施加激励电压，其中：每个上电极 并且所述下电极包括谐振部分和引出部分; 并且上电极和下电极中的至少一个中的引出部分的至少一部分的电极厚度大于形成为从引出部分继续的谐振部分的电极厚度。

公开(公告)号：US20030137039A1

公开(公告)日：2003-07-24

申请号：US10298228

申请日：2002-11-18

申请人： TDK Corporation

发明人： Masahiro Nakano ,  Katsuhiko Gunji ,  Yasunobu Oikawa ,  Katsuo Sato

IPC分类号： H01L023/02

CPC分类号： H03H9/1071 ,  H01L2224/16225 ,  H01L2224/45144 ,  H03H9/0585 ,  H03H9/059 ,  H03H9/08 ,  H01L2924/00

摘要： A basic portion layer 21 of a substrate electrode 12a connected to a projecting electrode 13 electrically and mechanically on a substrate member of ceramics. The substrate member on which the basic portion layer 21 is formed is subjected to sintering. A surface of the basic portion layer 21 in the sintered substrate member is polished. On the polished basic portion layer 21, the plating layers 22, 23, are formed, so that surface roughness of the substrate electrode 12a may be, for example, not larger than 0.1 nullmRMS. Accordingly, junction strength of an integrated circuit element mounted on a packaging substrate by a flip-chip method can be improved.

摘要翻译： 衬底电极12a的基本部分层21，电连接到突出电极13，陶瓷的基片上。 对其上形成有碱性部分层21的基材进行烧结。 研磨烧结基板部件中的基体部分层21的表面。 在抛光的基底层21上形成镀层22,23，使得基板电极12a的表面粗糙度例如可以不大于0.1mumRMS。 因此，可以提高通过倒装芯片方法安装在封装基板上的集成电路元件的结合强度。

公开(公告)号：US20030117238A1

公开(公告)日：2003-06-26

申请号：US10260265

申请日：2002-10-01

申请人： TDK Corporation.

发明人： Taku Takeishi ,  Katsuhiko Gunji ,  Eiju Komuro

IPC分类号： H03H009/54

CPC分类号： H03H9/02047 ,  H03H9/0523 ,  H03H9/605 ,  Y10T29/42

摘要： A piezoelectric resonant filter comprises a chip having a plurality of thin-film piezoelectric resonators, and a mounting substrate on which the chip is mounted. The chip is mounted on the mounting substrate by flip chip bonding. A plurality of bumps provided on the chip are bonded to a plurality of conductors on the mounting substrate by interdiffusion between atoms, in a solid phase, of the respective metals of which the bumps and the conductors are made, without involving melting of the respective metals of which the bumps and the conductors are made. The chip has a series resonator and a parallel resonator each formed of a thin-film piezoelectric resonator. These resonators constitute a ladder filter circuit.

摘要翻译： 压电谐振滤波器包括具有多个薄膜压电谐振器的芯片和安装芯片的安装基板。 芯片通过倒装芯片接合安装在安装基板上。 设置在芯片上的多个凸块通过在形成凸块和导体的相应金属的固相中的原子之间的相互扩散而不涉及相应金属熔化而在安装基板上的多个导体上结合 其中制作了凸块和导体。 该芯片具有由薄膜压电谐振器形成的串联谐振器和并联谐振器。 这些谐振器构成梯形滤波器电路。