公开(公告)号：US09252706B2

公开(公告)日：2016-02-02

申请号：US14291457

申请日：2014-05-30

申请人： Seiko Epson Corporation

发明人： Kunihito Yamanaka ,  Naohisa Obata

IPC分类号： H03B5/30 ,  H03B5/32 ,  H03H9/25 ,  H01L41/053 ,  H03H9/02 ,  H03H9/05

CPC分类号： H03B5/326 ,  H01L41/053 ,  H01L2224/05554 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/16195 ,  H03H9/02897 ,  H03H9/058 ,  H03H9/0585 ,  H03H9/25 ,  H01L2924/00014

摘要： A SAW device includes a SAW chip formed of a piezoelectric substrate and an IDT formed thereon, a base substrate that supports the SAW chip, and a fixing member that fixes the SAW chip to the base substrate. The SAW chip that forms a cantilever is supported by the base substrate via the fixing member in a position where the IDT does not overlap with the fixing member in a plan view of the SAW chip. The length W of the SAW chip in a y-axis direction and the length D of the fixing member in the y-axis direction satisfy 1

摘要翻译： SAW器件包括由压电基片和形成在其上的IDT形成的SAW芯片，支撑SAW芯片的基底基板和将SAW芯片固定到基底基板的固定部件。 形成悬臂的SAW芯片在SAW芯片的平面图中，通过固定部件被支撑在IDT与固定部件不重叠的位置的基底基板上。 SAW芯片在y轴方向上的长度W和固定构件在y轴方向上的长度D满足1

公开(公告)号：USRE45419E1

公开(公告)日：2015-03-17

申请号：US12276319

申请日：2008-11-22

申请人： Osamu Kawachi ,  Osamu Ikata ,  Masanori Ueda ,  Suguru Warashina

发明人： Osamu Kawachi ,  Osamu Ikata ,  Masanori Ueda ,  Suguru Warashina

IPC分类号： H03H9/72 ,  H03H9/64 ,  H03H3/08 ,  H03H9/54

CPC分类号： H03H9/1092 ,  H01L2224/48091 ,  H01L2224/48227 ,  H03H9/0547 ,  H03H9/0585 ,  H03H9/059 ,  Y10T29/42 ,  H01L2924/00014

摘要： A surface acoustic wave device includes a piezoelectric substrate having a first surface on which comb-like electrodes, first pads connected thereto, and a first film are provided. The first film is located so as to surround the comb-like electrodes. A base substrate has a second surface on which second pads joined to the first pads and a second film joined to the first film are provided. The first and second films joined by a surface activation process define a cavity in which the comb-like electrodes and the first and second pads are hermetically sealed.

摘要翻译： 声表面波装置包括具有第一表面的压电基片，其上设有梳状电极，与其连接的第一焊盘和第一膜。 第一膜定位成围绕梳状电极。 基底基板具有第二表面，第二焊盘在其上连接到第一焊盘，并且提供连接到第一膜的第二膜。 通过表面激活工艺连接的第一和第二膜限定了其中梳状电极和第一和第二焊盘被气密地密封的空腔。

公开(公告)号：US08841817B2

公开(公告)日：2014-09-23

申请号：US13557378

申请日：2012-07-25

申请人： Hideaki Yamada ,  Kazuhiko Kano

发明人： Hideaki Yamada ,  Kazuhiko Kano

IPC分类号： H03H9/02 ,  H01L41/113 ,  H03H9/05 ,  G01N29/24 ,  G01N29/38 ,  G01N29/42

CPC分类号： H01L41/1132 ,  G01N29/2462 ,  G01N29/38 ,  G01N29/42 ,  G01N2291/0423 ,  H03H9/02622 ,  H03H9/058 ,  H03H9/0585

摘要： In a SAW device, a first area placed at a surface of a measurement subject directly under a propagation portion is fixed to the measurement subject, and a second area placed at the surface of the measurement subject directly under both a drive electrode and a reflector is not fixed to the measurement subject. When a strain is generated in the measurement subject, a strain is generated only in the propagation portion, and a phase change is generated in a surface acoustic wave reflected by the reflector. Because the phase change is hardly affected by a temperature change, the strain of the measurement subject can be measured based on the phase change. Because a resonant frequency of the SAW device is changed by the temperature change, but is not affected by the strain of the measurement subject, a temperature can be measured based on a resonant frequency change.

摘要翻译： 在SAW器件中，将直接位于传播部分的测量对象的表面的第一区域固定在测定对象上，在测量对象的表面直接位于驱动电极和反射体的下方的第二区域是 没有固定在测量对象上。 当在测量对象中产生应变时，仅在传播部分中产生应变，并且在由反射器反射的表面声波中产生相变。 由于相变几乎不受温度变化的影响，所以测量对象的应变可以基于相位变化来测量。 由于SAW器件的谐振频率由于温度变化而变化，而是不受测量对象的应变的影响，所以可以基于谐振频率变化来测量温度。

公开(公告)号：US20120086312A1

公开(公告)日：2012-04-12

申请号：US13253156

申请日：2011-10-05

申请人： Hiroki Kobayashi ,  Takanori Sakurai ,  Yuji Hori ,  Yasunori Iwasaki

发明人： Hiroki Kobayashi ,  Takanori Sakurai ,  Yuji Hori ,  Yasunori Iwasaki

IPC分类号： H01L41/053 ,  H01L41/22

CPC分类号： H03H9/0585 ,  H03H3/10 ,  H03H9/02574 ,  H03H9/02622 ,  Y10T29/42

摘要： According to a composite substrate manufacturing method of the present invention, (a) a piezoelectric substrate having minute asperities formed in a rear surface thereof, and a support substrate having a smaller thermal expansion coefficient than the piezoelectric substrate are prepared, (b) a filler is applied to the rear surface 11a to fill the minute asperities, thereby forming a filling layer, (c) a surface of the filling layer is mirror-polished to such an extent that an arithmetic mean roughness Ra of the surface of the filling layer is smaller than an arithmetic mean roughness Ra of the rear surface 11a in a state of above (a), and (d) the surface of the filling layer and a surface of the support substrate are bonded to each other with an adhesive layer interposed therebetween, thereby forming a composite substrate.

摘要翻译： 根据本发明的复合基板的制造方法，（a）在其后表面形成有微小的凹凸的压电基板和具有比压电基板的热膨胀系数小的支撑基板，（b）填料 施加到后表面11a以填充微小的凹凸，从而形成填充层，（c）将填充层的表面镜面抛光至使填充层的表面的算术平均粗糙度Ra为 小于上述（a）的状态下的后表面11a的算术平均粗糙度Ra，（d）填充层的表面和支撑基板的表面之间粘合层彼此接合， 从而形成复合基板。

公开(公告)号：US07474034B2

公开(公告)日：2009-01-06

申请号：US11636580

申请日：2006-12-11

申请人： Takehiko Shindo

发明人： Takehiko Shindo

IPC分类号： H03H9/25

CPC分类号： H03H9/1071 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/16195 ,  H03H9/0585 ,  H01L2924/00014 ,  H01L2924/00

摘要： A surface acoustic wave element includes a piezoelectric substrate, an IDT composed of a pair of first and second comb-like electrodes, formed around a center of the piezoelectric substrate, and formed on a surface of the surface acoustic wave element, and a pair of first and second terminals electrically connected to the IDT, formed at central and peripheral areas of the piezoelectric substrate, respectively, in which a package is bonded with an adhesive to a surface of the surface acoustic wave element, opposite to the surface formed with the IDT.

摘要翻译： 表面声波元件包括压电基片，由一对第一和第二梳状电极组成的IDT，形成在压电基片的中心周围并形成在表面声波元件的表面上，一对 电连接到IDT的第一和第二端子分别形成在压电基板的中心区域和周边区域，其中封装件用粘合剂粘合到表面声波元件的与IDT形成的表面相对的表面 。

公开(公告)号：US07224056B2

公开(公告)日：2007-05-29

申请号：US10949844

申请日：2004-09-24

申请人： Robert Burtzlaff ,  Belgacem Haba ,  Giles Humpston ,  David B. Tuckerman ,  Michael Warner ,  Craig S. Mitchell

发明人： Robert Burtzlaff ,  Belgacem Haba ,  Giles Humpston ,  David B. Tuckerman ,  Michael Warner ,  Craig S. Mitchell

IPC分类号： H01L23/12

CPC分类号： H01L23/3114 ,  B81B2207/095 ,  B81C1/00293 ,  B81C1/00301 ,  B81C2203/0118 ,  B81C2203/0145 ,  B81C2203/019 ,  H01L21/76898 ,  H01L23/04 ,  H01L24/11 ,  H01L24/13 ,  H01L24/48 ,  H01L27/14618 ,  H01L27/14627 ,  H01L27/14636 ,  H01L33/62 ,  H01L2224/0401 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/11 ,  H01L2224/11334 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13169 ,  H01L2224/1401 ,  H01L2224/16 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/484 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01058 ,  H01L2924/01061 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/07811 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/16151 ,  H01L2924/16195 ,  H01L2924/16235 ,  H01L2924/3011 ,  H01L2924/3025 ,  H03H3/007 ,  H03H9/0547 ,  H03H9/0585 ,  H03H9/059 ,  H03H9/1057 ,  H03H9/1064 ,  H03H9/1071 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099

摘要： A packaged microelectronic device is provided which includes: (a) a unit having a chip with an upwardly-facing front surface and a downwardly-facing rear surface, a lid overlying at least a portion of the front surface of the chip, the lid having a top surface facing upwardly away from the chip and unit connections exposed at the top surface of the lid. At least some of the unit connections are electrically connected to the chip. The packaged microelectronic device also includes a package structure including structure defining package terminals, at least some of the package terminals being electrically connected to the chip. The package structure, the unit or both define a downwardly-facing bottom surface of the package, the terminals being exposed at the bottom surface.

摘要翻译： 提供一种封装的微电子器件，其包括：（a）具有面向上的前表面和面向下的后表面的芯片的单元，覆盖所述芯片的前表面的至少一部分的盖，所述盖具有 面向上远离芯片的顶表面和暴露在盖的顶表面处的单元连接。 至少一些单元连接电连接到芯片。 封装的微电子器件还包括包括限定封装端子的结构的封装结构，至少一些封装端子电连接到芯片。 封装结构，单元或两者限定了封装的向下的底部表面，端子在底部表面露出。

公开(公告)号：US07129576B2

公开(公告)日：2006-10-31

申请号：US10949693

申请日：2004-09-24

申请人： Giles Humpston

发明人： Giles Humpston

IPC分类号： H01L23/12

CPC分类号： H01L23/3114 ,  B81B2207/095 ,  B81C1/00293 ,  B81C1/00301 ,  B81C2203/0118 ,  B81C2203/0145 ,  B81C2203/019 ,  H01L21/76898 ,  H01L23/04 ,  H01L24/11 ,  H01L24/13 ,  H01L24/48 ,  H01L27/14618 ,  H01L27/14627 ,  H01L27/14636 ,  H01L33/62 ,  H01L2224/0401 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/11 ,  H01L2224/11334 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13169 ,  H01L2224/1401 ,  H01L2224/16 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/484 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01058 ,  H01L2924/01061 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/07811 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/16151 ,  H01L2924/16195 ,  H01L2924/16235 ,  H01L2924/3011 ,  H01L2924/3025 ,  H03H3/007 ,  H03H9/0547 ,  H03H9/0585 ,  H03H9/059 ,  H03H9/1057 ,  H03H9/1064 ,  H03H9/1071 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099

摘要： A capped chip is provided which includes a chip and a cap member, the chip having a front surface and a plurality of bond pads exposed at the front surface, the cap member having a bottom surface facing the front surface of the chip and having a top surface opposite the front surface. A plurality of through holes extend from the bottom surface of the cap member to the top surface. The capped chip assembly further includes a plurality of metallic interconnects extending from the bond pads at least partially through the through holes, the metallic interconnects including stud bumps joined to the bond pads, the stud bumps contacting and engaging at least one of (i) the top surface of the cap member surrounding the through holes and (ii) inner surfaces of the through holes.

摘要翻译： 提供一种封盖芯片，其包括芯片和盖构件，所述芯片具有前表面和暴露在前表面的多个接合焊盘，所述盖构件具有面向芯片的前表面的底表面，并且具有顶部 表面与前表面相对。 多个通孔从盖构件的底表面延伸到顶表面。 所述封装芯片组件还包括多个金属互连件，所述多个金属互连件至少部分地穿过所述通孔从所述接合焊盘延伸，所述金属互连件包括连接到所述接合焊盘的柱形凸块，所述凸块凸块接触并接合（i） 围绕通孔的帽构件的顶表面和（ii）通孔的内表面。

公开(公告)号：US20060134834A1

公开(公告)日：2006-06-22

申请号：US11333316

申请日：2006-01-18

申请人： Masahiro Nakano ,  Katsuhiko Gunji ,  Yasunobu Oikawa ,  Katsuo Sato

发明人： Masahiro Nakano ,  Katsuhiko Gunji ,  Yasunobu Oikawa ,  Katsuo Sato

IPC分类号： H01L21/48

CPC分类号： H03H9/1071 ,  H01L2224/16225 ,  H01L2224/45144 ,  H03H9/0585 ,  H03H9/059 ,  H03H9/08 ,  H01L2924/00

摘要： A basic portion layer 21 of a substrate electrode 12a connected to a projecting electrode 13 electrically and mechanically on a substrate member of ceramics. The substrate member on which the basic portion layer 21 is formed is subjected to sintering. A surface of the basic portion layer 21 in the sintered substrate member is polished. On the polished basic portion layer 21, the plating layers 22, 23. are formed, so that surface roughness of the substrate electrode 12a may be, for example, not larger than 0.1 μmRMS Accordingly, junction strength of an integrated circuit element mounted on a packaging substrate by a flip-chip method can be improved.

摘要翻译： 衬底电极12a的基本部分层21，其在陶瓷的衬底构件上电连接到突出电极13。 对其上形成有碱性部分层21的基材进行烧结。 研磨烧结基板部件中的基体部分层21的表面。 在抛光的基底层21上，形成镀层22,23，使得基板电极12a的表面粗糙度例如可以不大于0.1μm。因此，集成电路元件的结合强度 可以提高通过倒装芯片方法的封装衬底。

公开(公告)号：US20050095835A1

公开(公告)日：2005-05-05

申请号：US10949674

申请日：2004-09-24

申请人： Giles Humpston ,  David Tuckerman ,  Bruce McWilliams ,  Belgacem Haba ,  Craig Mitchell

发明人： Giles Humpston ,  David Tuckerman ,  Bruce McWilliams ,  Belgacem Haba ,  Craig Mitchell

IPC分类号： H01L21/60 ,  H01L23/04 ,  H01L23/10 ,  H01L23/485 ,  H01L27/146 ,  H03H3/007 ,  H03H3/08 ,  H03H9/10 ,  H01L21/48

CPC分类号： H01L23/3114 ,  B81B2207/095 ,  B81C1/00293 ,  B81C1/00301 ,  B81C2203/0118 ,  B81C2203/0145 ,  B81C2203/019 ,  H01L21/76898 ,  H01L23/04 ,  H01L24/11 ,  H01L24/13 ,  H01L24/48 ,  H01L27/14618 ,  H01L27/14627 ,  H01L27/14636 ,  H01L33/62 ,  H01L2224/0401 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/11 ,  H01L2224/11334 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13169 ,  H01L2224/1401 ,  H01L2224/16 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/484 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01058 ,  H01L2924/01061 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/07811 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/16151 ,  H01L2924/16195 ,  H01L2924/16235 ,  H01L2924/3011 ,  H01L2924/3025 ,  H03H3/007 ,  H03H9/0547 ,  H03H9/0585 ,  H03H9/059 ,  H03H9/1057 ,  H03H9/1064 ,  H03H9/1071 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099

摘要： Capped chips and methods of forming a capped chip are provided in which electrical interconnects are made by conductive elements which extend from bond pads of a chip at least partially through a plurality of through holes of a cap. The electrical interconnects may be solid, so as to form seals extending across the through holes. In some cases, stud bumps extend from the bond pads, forming parts of the electrical interconnects. In some cases, a fusible conductive medium forms a part of the electrical interconnects.

摘要翻译： 提供了覆盖芯片和形成封盖芯片的方法，其中电互连通过至少部分地通过盖的多个通孔从芯片的焊盘延伸的导电元件制成。 电互连可以是固体的，以便形成延伸穿过通孔的密封件。 在一些情况下，螺柱凸起从接合焊盘延伸，形成电互连的部分。 在一些情况下，可熔导电介质形成电互连的一部分。

公开(公告)号：US20040251560A1

公开(公告)日：2004-12-16

申请号：US10813393

申请日：2004-03-31

申请人： TDK Corporation

发明人： Masahiro Nakano ,  Katsuhiko Gunji ,  Yasunobu Oikawa ,  Katsuo Sato

IPC分类号： H01L021/48 ,  H01L023/48

CPC分类号： H03H9/1071 ,  H01L2224/16225 ,  H01L2224/45144 ,  H03H9/0585 ,  H03H9/059 ,  H03H9/08 ,  H01L2924/00

摘要： A basic portion layer 21 of a substrate electrode 12a connected to a projecting electrode 13 electrically and mechanically on a substrate member of ceramics. The substrate member on which the basic portion layer 21 is formed is subjected to sintering. A surface of the basic portion layer 21 in the sintered substrate member is polished. On the polished basic portion layer 21, the plating layers 22, 23 are formed, so that surface roughness of the substrate electrode 12a may be, for example, not larger than 0.1 nullmRMS. Accordingly, junction strength of an integrated circuit element mounted on a packaging substrate by a flip-chip method can be improved.

摘要翻译： 衬底电极12a的基本部分层21，电连接到突出电极13，陶瓷的基片上。 对其上形成有碱性部分层21的基材进行烧结。 研磨烧结基板部件中的基体部分层21的表面。 在抛光的基底层21上形成镀层22,23，使得基板电极12a的表面粗糙度例如可以不大于0.1μmumRMS。 因此，可以提高通过倒装芯片方法安装在封装基板上的集成电路元件的结合强度。