ENHANCING TX-TX ISOLATION THROUGH DIGITAL PRE-COMPENSATION

    公开(公告)号:US20220271783A1

    公开(公告)日:2022-08-25

    申请号:US17489381

    申请日:2021-09-29

    Abstract: A TX-TX pre-compensation system that estimates unwanted coupling in a victim transmit chain caused by an aggressor transmit chain and injects a pre-compensation signal to cancel out the estimated coupling. In some embodiments, a signal measurement module estimates the amplitude, phase, and envelope delay of the coupling and an isolation pre-compensation module generates the pre-compensation signal based on the estimated amplitude, the estimated phase, the estimated envelope delay, and the difference between the carrier frequencies of the transmit chains. Since the phase of the coupling may be affected by the carrier frequency of the transmit chains, in some embodiments the phase of the pre-compensation signal is adjusted in response to a change in carrier frequency. Since the amplitude of the coupling may be affected by attenuator gain settings, in some embodiments the amplitude of the pre-compensation signal may be adjusted in response to a change in attenuator gain setting.

    IQ MISMATCH CORRECTION FILTER
    3.
    发明申请

    公开(公告)号:US20200153675A1

    公开(公告)日:2020-05-14

    申请号:US16525103

    申请日:2019-07-29

    Abstract: An IQ estimation module comprising a powerup state IQ estimator configured to generate powerup state IQ estimates based on a powerup calibration of the IQ estimation module, a steady state IQ estimator configured to generate steady state IQ estimates during a steady state operation of the IQ estimation module, and an IQ estimate extender configured to determine differences between the powerup state IQ estimates and steady state IQ estimates at their respective frequency bins and adjust the powerup state IQ estimates to improve the accuracy of IQ estimates.

    BAND SPECIFIC INTERLEAVING MISMATCH COMPENSATION IN RF ADCS

    公开(公告)号:US20180175873A1

    公开(公告)日:2018-06-21

    申请号:US15791538

    申请日:2017-10-24

    CPC classification number: H03M1/08 H03M1/1009 H03M1/1042 H03M1/1215

    Abstract: An integrated circuit chip includes an interleaved analog-to-digital converter (ADC) and an interleaving calibration circuit. The interleaved ADC includes a plurality of ADCs that are each configured to sample an analog signal. The interleaved ADC is configured to convert the analog signal into an interleaved analog-to-digital signal (IADC signal) that includes a plurality of spurious signals formed from mismatches between the plurality of ADCs. The interleaving calibration circuit is configured to receive the IADC signal from the interleaved ADC, generate a mismatch profile estimate corresponding to the plurality of spurious signals to generate one or more mismatch profile estimates, determine whether a first mismatch profile estimate is in a frequency band of interest, and, in response to a determination that the first mismatch profile estimate is in the frequency band of interest, generate a set of model parameters based on the first mismatch profile estimate.

    ANALOG-TO-DIGITAL CONVERTER NON-LINEARITY CORRECTION USING COEFFICIENT TRANSFORMATION

    公开(公告)号:US20180097525A1

    公开(公告)日:2018-04-05

    申请号:US15674175

    申请日:2017-08-10

    CPC classification number: H03M1/08 H03M1/06 H03M1/0836 H03M1/0854 H03M1/1042

    Abstract: Circuitry for correcting non-linearity of an analog-to-digital converter. A non-linearity correction system for an analog-to-digital converter (ADC) includes coefficient storage, coefficient transformation circuitry, and correction circuitry. The coefficient storage is encoded with a first set of coefficients for correcting non-linearity of the ADC at a first sampling rate. The coefficient transformation circuitry is coupled to the coefficient storage. The coefficient transformation circuitry is configured to generate a second set of coefficients for correcting non-linearity of the ADC at a different sampling rate. The correction circuitry is configured to apply the second set of coefficients to correct non-linearity in output of the ADC while the ADC is operating at the different sampling rate.

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