公开(公告)号：US10573581B2

公开(公告)日：2020-02-25

申请号：US15280398

申请日：2016-09-29

Applicant: Texas Instruments Incorporated

Inventor： Chih-Chien Ho ,  Chung-Hao Lin ,  Yuh-Harng Chien

IPC: H01L23/495

Abstract: A leadframe has a peripheral frame. A die attach pad (DAP) is positioned inwardly and downwardly of the peripheral frame. Two spaced apart parallel arms engage one side of the DAP. In one embodiment the arms are portions of a U-shaped strap.

公开(公告)号：US20180090419A1

公开(公告)日：2018-03-29

申请号：US15280398

申请日：2016-09-29

Applicant: Texas Instruments Incorporated

Inventor： Chih-Chien Ho ,  Chung-Hao Lin ,  Yuh-Harng Chien

IPC: H01L23/495

Abstract: A leadframe has a peripheral frame. A die attach pad (DAP) is positioned inwardly and downwardly of the peripheral frame. Two spaced apart parallel arms engage one side of the DAP. In one embodiment the arms are portions of a U-shaped strap.

公开(公告)号：US20240274569A1

公开(公告)日：2024-08-15

申请号：US18617449

申请日：2024-03-26

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Bo-Hsun Pan ,  Hung-Yu Chou ,  Chung-Hao Lin ,  Yuh-Harng Chien

IPC: H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01L23/28

CPC classification number: H01L24/48 ,  H01L21/4828 ,  H01L21/565 ,  H01L23/28 ,  H01L24/29 ,  H01L24/32 ,  H01L2224/04042 ,  H01L2224/48091 ,  H01L2224/48177

Abstract: An integrated circuit and method of making an integrated circuit is provided. The integrated circuit includes an electrically conductive pad having a generally planar top surface that includes a cavity having a bottom surface and sidewalls extending from the bottom surface of the cavity to the top surface of the pad. An electronic device is attached to the top surface of the electrically conductive pad. A wire bond is attached from the electronic device to the bottom surface of the cavity. A molding compound encapsulates the electronic device.

公开(公告)号：US11942448B2

公开(公告)日：2024-03-26

申请号：US17377719

申请日：2021-07-16

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Bo-Hsun Pan ,  Hung-Yu Chou ,  Chung-Hao Lin ,  Yuh-Harng Chien

IPC: H01L21/56 ,  H01L21/48 ,  H01L23/00 ,  H01L23/28

CPC classification number: H01L24/48 ,  H01L21/4828 ,  H01L21/565 ,  H01L23/28 ,  H01L24/29 ,  H01L24/32 ,  H01L2224/04042 ,  H01L2224/48091 ,  H01L2224/48177

Abstract: An integrated circuit and method of making an integrated circuit is provided. The integrated circuit includes an electrically conductive pad having a generally planar top surface that includes a cavity having a bottom surface and sidewalls extending from the bottom surface of the cavity to the top surface of the pad. An electronic device is attached to the top surface of the electrically conductive pad. A wire bond is attached from the electronic device to the bottom surface of the cavity. A molding compound encapsulates the electronic device.

公开(公告)号：US20230016577A1

公开(公告)日：2023-01-19

申请号：US17377719

申请日：2021-07-16

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Bo-Hsun Pan ,  Hung-Yu Chou ,  Chung-Hao Lin ,  Yuh-Harng Chien

IPC: H01L23/00 ,  H01L21/56 ,  H01L21/48 ,  H01L23/28

Abstract: An integrated circuit and method of making an integrated circuit is provided. The integrated circuit includes an electrically conductive pad having a generally planar top surface that includes a cavity having a bottom surface and sidewalls extending from the bottom surface of the cavity to the top surface of the pad. An electronic device is attached to the top surface of the electrically conductive pad. A wire bond is attached from the electronic device to the bottom surface of the cavity. A molding compound encapsulates the electronic device.

公开(公告)号：US11862538B2

公开(公告)日：2024-01-02

申请号：US17463124

申请日：2021-08-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Chung-Hao Lin ,  Hung-Yu Chou ,  Bo-Hsun Pan ,  Dong-Ren Peng ,  Pi-Chiang Huang ,  Yuh-Harng Chien

IPC: H01L23/495 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L23/49513 ,  H01L21/4825 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/4952 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L2924/181

Abstract: In some examples a semiconductor chip package includes a conductive terminal. In addition, the semiconductor chip package includes a die pad including a top side and a recess extending into the top side. The die pad is downset relative to the conductive terminal. Further, the semiconductor ship package includes a semiconductor die positioned within the recess, wherein the semiconductor die has an outer perimeter, and a solder fillet engaged within the recess and with the outer perimeter of the semiconductor die. Still further, the semiconductor chip package includes a wire bond coupled to the semiconductor die and the conductive terminal, and a mold compound covering the conductive terminal, the wire bond, the die pad, and the semiconductor die.