PLL lock range extension over temperature

    公开(公告)号:US10187071B2

    公开(公告)日:2019-01-22

    申请号:US15387636

    申请日:2016-12-21

    Abstract: A PLL including a VCO with a variable capacitance (such as an LC VCO) including a switched capacitor bank and a varactor, the PLL providing lock range extension over temperature using dynamic capacitor bank switching to dynamically adjust varactor set point based on junction temperature. The varactor is responsive to the Vctrl control voltage to adjust a capacitance of the variable capacitance to control the phase of the PLL signal. Compensation circuitry dynamically adjusts varactor set point by dynamically switching the capacitor bank based in a junction temperature associated with the PLL circuitry, thereby extending PLL lock range over temperature.

    Method and Apparatus Having Enhanced Oscillator Phase Noise Using High Vt MOS Devices
    4.
    发明申请
    Method and Apparatus Having Enhanced Oscillator Phase Noise Using High Vt MOS Devices 有权
    使用高Vt MOS器件增强振荡器相位噪声的方法和装置

    公开(公告)号:US20150333698A1

    公开(公告)日:2015-11-19

    申请号:US14712336

    申请日:2015-05-14

    Abstract: A voltage-controlled oscillator (VCO), includes a resonator circuit connected to receive an input voltage and having a first output node and a second output node; and at least one cross-coupled switching circuit portion, each cross-coupled switching circuit portion comprising a first transistor having a drain connected to the first output node and a second transistor having a drain connected to the second output node, the first transistor having a gate connected between the drain of the second transistor and the second output node and the second transistor having a gate connected between the drain of the first transistor and the first output node, each of the first and second transistors having a threshold voltage that is determined to be the highest threshold voltage available for the process used to create the VCO.

    Abstract translation: 压控振荡器(VCO)包括连接以接收输入电压并具有第一输出节点和第二输出节点的谐振器电路; 和至少一个交叉耦合开关电路部分,每个交叉耦合的开关电路部分包括具有连接到第一输出节点的漏极的第一晶体管和连接到第二输出节点的漏极的第二晶体管,第一晶体管具有 连接在第二晶体管的漏极和第二输出节点之间的栅极,第二晶体管具有连接在第一晶体管的漏极和第一输出节点之间的栅极,第一和第二晶体管中的每一个具有阈值电压,其被确定为 是可用于创建VCO的过程的最高阈值电压。

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