公开(公告)号：US20240222310A1

公开(公告)日：2024-07-04

申请号：US18090922

申请日：2022-12-29

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Gregory OSTROWICKI ,  Amit NANGIA ,  Kashyap MOHAN

IPC: H01L23/00 ,  H01L21/56

CPC classification number: H01L24/32 ,  H01L21/565 ,  H01L24/16 ,  H01L24/73 ,  H01L2224/16225 ,  H01L2224/32227 ,  H01L2224/73253 ,  H01L2924/351

Abstract: In examples, a semiconductor package comprises a substrate having multiple conductive layers coupled to bond pads at a surface of the substrate. The package includes a semiconductor die including a device side facing the substrate, the device side having first and second circuitry regions, the first circuitry region having greater sensitivity to at least one of mechanical or thermal stress than the second circuitry region. The package also includes conductive members coupled to the bond pads of the substrate, in direct physical contact with the second circuitry region, and not in direct physical contact with the first circuitry region. The package further comprises a first support member coupled to the device side of the semiconductor die and extending toward the substrate and not touching the substrate or a second support member coupled to the substrate. The package also includes a ring on the substrate and encircling the bond pads and a glob top member covering the semiconductor die and a portion of the substrate circumscribed by the ring. The package also includes a mold compound covering the glob top member and the substrate.

公开(公告)号：US20230274993A1

公开(公告)日：2023-08-31

申请号：US17683253

申请日：2022-02-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Anindya PODDAR ,  Amin SIJELMASSI ,  Hau NGUYEN ,  Kashyap MOHAN

IPC: H01L23/31 ,  H01L23/04

CPC classification number: H01L23/3121 ,  H01L23/04

Abstract: One example includes a method for fabricating an integrated circuit (IC) device. The method includes fabricating a semiconductor die comprising an IC. The method also includes patterning a film over a portion of the first surface of the semiconductor die. The method also includes attaching a second surface of the semiconductor die opposite the first surface to a substrate. The method further includes depositing molding material over the semiconductor die to cover at least the first surface of the semiconductor die.

公开(公告)号：US20240145419A1

公开(公告)日：2024-05-02

申请号：US17977610

申请日：2022-10-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Daiki KOMATSU ,  Kashyap MOHAN

IPC: H01L23/00 ,  H01L21/56 ,  H01L21/67 ,  H01L23/31

CPC classification number: H01L24/16 ,  H01L21/563 ,  H01L21/67144 ,  H01L23/3121 ,  H01L24/13 ,  H01L24/75 ,  H01L24/81 ,  H01L2224/13147 ,  H01L2224/16258 ,  H01L2224/75262 ,  H01L2224/81224 ,  H01L2224/81447 ,  H01L2224/8183

Abstract: An example method includes placing a semiconductor die on a bonding surface of metal substrate. The die includes metal pillars extending from a surface of the die aligned with respective bonding locations on the bonding surface of the substrate. The pillars and the substrate can be formed of a common type of metal. The method also includes controlling a laser to emit laser light to heat the substrate at respective bonding locations to bond the metal pillars with the substrate at the respective bonding locations.