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    INTEGRATED CIRCUIT WITH METAL STOP RING OUTSIDE THE SCRIBE SEAL
    3.
    发明申请
    INTEGRATED CIRCUIT WITH METAL STOP RING OUTSIDE THE SCRIBE SEAL 有权

    公开(公告)号：US20210210440A1

    公开(公告)日：2021-07-08

    申请号：US16737237

    申请日：2020-01-08

    Applicant: Texas Instruments Incorporated

    Inventor： Christopher Daniel Manack ,  Qiao Chen ,  Michael Todd Wyant ,  Matthew John Sherbin ,  Patrick Francis Thompson

    IPC: H01L23/58 ,  H01L23/532 ,  H01L23/528

    Abstract: An integrated circuit (IC) die includes a substrate with circuitry configured for at least one function including metal interconnect levels thereon including a top metal interconnect level and a bottom metal interconnect level, with a passivation layer on the top metal interconnect level. A scribe street is around a periphery of the IC die, the scribe street including a scribe seal utilizing at least two of the plurality of metal interconnect levels, an inner metal meander stop ring including at least the top metal interconnect level located outside the scribe seal, wherein the scribe seal and the inner metal meander stop ring are separated by a first separation gap. An outer metal meander stop ring including at least the top metal interconnect level is located outside the inner metal stop ring, wherein the outer stop ring and the inner stop ring are separated by a second separation gap.

    LASER DICING FOR SINGULATION
    4.
    发明申请
    LASER DICING FOR SINGULATION 有权

    公开(公告)号：US20230040267A1

    公开(公告)日：2023-02-09

    申请号：US17960568

    申请日：2022-10-05

    Applicant: Texas Instruments Incorporated

    Inventor： Michael Todd Wyant ,  Dave Charles Stepniak ,  Matthew John Sherbin ,  Sada Hiroyuki ,  Shoichi Iriguchi ,  Genki Yano

    IPC: H01L21/78 ,  H01L21/683 ,  H01L21/67 ,  H01L21/268 ,  H01L23/58

    Abstract: In a described example, a method includes: applying a dicing tape over a metal layer covering a portion of a surface of scribe streets on a device side of a semiconductor wafer that includes semiconductor device dies formed thereon separated from one another by the scribe streets; and placing the semiconductor wafer with the device side facing away from a laser in a stealth dicing machine. A power of a laser beam is adjusted to a first power level. The laser beam is focused through the non-device side of the semiconductor wafer to a first focal depth in the metal layer. The laser beam scans across the scribe streets and ablates the metal layer in the scribe streets. The method continues by singulating the semiconductor device dies using stealth dicing along the scribe streets in the stealth dicing machine.

    LASER DICING FOR SINGULATION
    5.
    发明申请
    LASER DICING FOR SINGULATION 审中-公开

    公开(公告)号：US20200051860A1

    公开(公告)日：2020-02-13

    申请号：US16057126

    申请日：2018-08-07

    Applicant: Texas Instruments Incorporated

    Inventor： Michael Todd Wyant ,  Dave Charles Stepniak ,  Matthew John Sherbin ,  Sada Hiroyuki ,  Shoichi Iriguchi ,  Genki Yano

    IPC: H01L21/78 ,  H01L21/683 ,  H01L23/58 ,  H01L21/67 ,  H01L21/268

    Abstract: In a described example, a method includes: applying a dicing tape over a metal layer covering a portion of a surface of scribe streets on a device side of a semiconductor wafer that includes semiconductor device dies formed thereon separated from one another by the scribe streets; and placing the semiconductor wafer with the device side facing away from a laser in a stealth dicing machine. A power of a laser beam is adjusted to a first power level. The laser beam is focused through the non-device side of the semiconductor wafer to a first focal depth in the metal layer. The laser beam scans across the scribe streets and ablates the metal layer in the scribe streets. The method continues by singulating the semiconductor device dies using stealth dicing along the scribe streets in the stealth dicing machine.

    METHOD FOR IMPROVING TRANSISTOR PERFORMANCE
    6.
    发明申请
    METHOD FOR IMPROVING TRANSISTOR PERFORMANCE 审中-公开

    公开(公告)号：US20200035833A1

    公开(公告)日：2020-01-30

    申请号：US16589951

    申请日：2019-10-01

    Applicant: Texas Instruments Incorporated

    Inventor： Steven Kummerl ,  Matthew John Sherbin ,  Saumya Gandhi

    IPC: H01L29/78 ,  H01L21/268 ,  H01L21/324 ,  H01L21/78 ,  H01L29/04 ,  H01L29/16

    Abstract: A method to improve transistor performance uses a wafer (100) of single-crystalline semiconductor with a first zone (102) of field effect transistors (FETs) and circuitry at the wafer surface, and an infrared (IR) laser with a lens for focusing the IR light to a second depth (112) farther from the wafer surface than the first depth of the first zone. The focused laser beam is moved parallel to the surface across the wafer to cause local multi-photon absorption at the second depth for transforming the single-crystalline semiconductor into a second zone (111) of polycrystalline semiconductor with high density of dislocations. The second zone has a height and lateral extensions, and permanently stresses the single-crystalline bulk semiconductor; the stress increases the majority carrier mobility in the channel of the FETs, improving the transistor performance.

    Method for improving transistor performance
    7.
    发明授权
    Method for improving transistor performance 有权

    公开(公告)号：US12087859B2

    公开(公告)日：2024-09-10

    申请号：US16589951

    申请日：2019-10-01

    Applicant: Texas Instruments Incorporated

    Inventor： Steven Kummerl ,  Matthew John Sherbin ,  Saumya Gandhi

    IPC: H01L29/78 ,  H01L21/268 ,  H01L21/324 ,  H01L21/78 ,  H01L29/04 ,  H01L29/16

    CPC classification number: H01L29/7849 ,  H01L21/268 ,  H01L21/324 ,  H01L21/78 ,  H01L29/04 ,  H01L29/16

    Abstract: A method to improve transistor performance uses a wafer (100) of single-crystalline semiconductor with a first zone (102) of field effect transistors (FETs) and circuitry at the wafer surface, and an infrared (IR) laser with a lens for focusing the IR light to a second depth (112) farther from the wafer surface than the first depth of the first zone. The focused laser beam is moved parallel to the surface across the wafer to cause local multi-photon absorption at the second depth for transforming the single-crystalline semiconductor into a second zone (111) of polycrystalline semiconductor with high density of dislocations. The second zone has a height and lateral extensions, and permanently stresses the single-crystalline bulk semiconductor; the stress increases the majority carrier mobility in the channel of the FETs, improving the transistor performance.

    Integrated circuit with metal stop ring outside the scribe seal
    8.
    发明授权
    Integrated circuit with metal stop ring outside the scribe seal 有权

    公开(公告)号：US12009319B2

    公开(公告)日：2024-06-11

    申请号：US16737237

    申请日：2020-01-08

    Applicant: Texas Instruments Incorporated

    Inventor： Christopher Daniel Manack ,  Qiao Chen ,  Michael Todd Wyant ,  Matthew John Sherbin ,  Patrick Francis Thompson

    IPC: H01L23/58 ,  H01L23/528 ,  H01L23/532

    CPC classification number: H01L23/585 ,  H01L23/528 ,  H01L23/53209

    Abstract: An integrated circuit (IC) die includes a substrate with circuitry configured for at least one function including metal interconnect levels thereon including a top metal interconnect level and a bottom metal interconnect level, with a passivation layer on the top metal interconnect level. A scribe street is around a periphery of the IC die, the scribe street including a scribe seal utilizing at least two of the plurality of metal interconnect levels, an inner metal meander stop ring including at least the top metal interconnect level located outside the scribe seal, wherein the scribe seal and the inner metal meander stop ring are separated by a first separation gap. An outer metal meander stop ring including at least the top metal interconnect level is located outside the inner metal stop ring, wherein the outer stop ring and the inner stop ring are separated by a second separation gap.

    Laser dicing for singulation
    9.
    发明授权
    Laser dicing for singulation 有权

    公开(公告)号：US11469141B2

    公开(公告)日：2022-10-11

    申请号：US16057126

    申请日：2018-08-07

    Applicant: Texas Instruments Incorporated

    Inventor： Michael Todd Wyant ,  Dave Charles Stepniak ,  Matthew John Sherbin ,  Sada Hiroyuki ,  Shoichi Iriguchi ,  Genki Yano

    IPC: H01L21/78 ,  H01L23/58 ,  H01L21/683 ,  H01L21/67 ,  H01L21/268

    Abstract: In a described example, a method includes: applying a dicing tape over a metal layer covering a portion of a surface of scribe streets on a device side of a semiconductor wafer that includes semiconductor device dies formed thereon separated from one another by the scribe streets; and placing the semiconductor wafer with the device side facing away from a laser in a stealth dicing machine. A power of a laser beam is adjusted to a first power level. The laser beam is focused through the non-device side of the semiconductor wafer to a first focal depth in the metal layer. The laser beam scans across the scribe streets and ablates the metal layer in the scribe streets. The method continues by singulating the semiconductor device dies using stealth dicing along the scribe streets in the stealth dicing machine.

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