公开(公告)号：US20230268377A1

公开(公告)日：2023-08-24

申请号：US18309999

申请日：2023-05-01

Applicant: Texas Instruments Incorporated

Inventor： Jeffrey West ,  Mrinal Das ,  Byron Williams ,  Thomas Bonifield ,  Maxim Franke

IPC: H01L23/528 ,  H01L23/31 ,  H01L23/495 ,  H01L23/522 ,  H01L23/00

CPC classification number: H01L28/60 ,  H01L23/3107 ,  H01L23/49513 ,  H01L23/4952 ,  H01L23/49575 ,  H01L23/5223 ,  H01L23/5286 ,  H01L24/05 ,  H01L2224/04042 ,  H01L2224/05025 ,  H01L2924/1426

Abstract: An IC includes a substrate including circuitry configured to provide a receiver or a transmitter circuit. A metal stack is over the semiconductor surface including a top metal layer and a plurality of lower metal layers. An isolation capacitor includes the top metal layer as a top plate that is electrically connected to a first node; and a top dielectric layer on the top plate with a top plate dielectric aperture. One of the plurality of lower metal layers provides a bottom plate that includes a plurality of spaced apart segments. A capacitor dielectric layer is between the top and bottom plate. The segments include a first segment electrically connected to a second node and at least a second segment electrically connected to a third node, with separation regions located between adjacent spaced apart segments. The top plate covers at least a portion of each of the separation regions.

公开(公告)号：US11716078B2

公开(公告)日：2023-08-01

申请号：US17709644

申请日：2022-03-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Rajdeep Bondade ,  Maxim Franke ,  Stephen Phillip Savage ,  Mrinal Kanti Das ,  Johan Tjeerd Strydom

IPC: H03K17/082 ,  H03K17/687

CPC classification number: H03K17/0822 ,  H03K17/6871 ,  H03K2217/94

Abstract: In one example, an apparatus comprises: a voltage sensing circuit having a voltage sensing terminal and a voltage sensing output, the voltage sensing circuit configured to generate a first voltage at the voltage sensing output representing a second voltage at the voltage sensing terminal; a control circuit having a control circuit input and a control circuit output, the control circuit input coupled to the voltage sensing output, the control circuit configured to: determine a state of a transistor based on the first voltage; and generate a driver signal at the control circuit output based on the state; and a driver circuit having a driver input and a switch control output, the driver input coupled to the control circuit output, the driver circuit configured to provide a current at the switch control output responsive to the driver signal.

公开(公告)号：US20240204040A1

公开(公告)日：2024-06-20

申请号：US18591587

申请日：2024-02-29

Applicant: Texas Instruments Incorporated

Inventor： Jeffrey West ,  Mrinal Das ,  Byron Williams ,  Thomas Bonifield ,  Maxim Franke

IPC: H01G4/30 ,  H01L23/00 ,  H01L23/31 ,  H01L23/495 ,  H01L23/522 ,  H01L23/528

CPC classification number: H01L28/60 ,  H01L23/3107 ,  H01L23/49513 ,  H01L23/4952 ,  H01L23/49575 ,  H01L23/5223 ,  H01L23/5286 ,  H01L24/05 ,  H01L2224/04042 ,  H01L2224/05025 ,  H01L2924/1426

Abstract: An IC includes a substrate including circuitry configured to provide a receiver or a transmitter circuit. A metal stack is over the semiconductor surface including a top metal layer and a plurality of lower metal layers. An isolation capacitor includes the top metal layer as a top plate that is electrically connected to a first node; and a top dielectric layer on the top plate with a top plate dielectric aperture. One of the plurality of lower metal layers provides a bottom plate that includes a plurality of spaced apart segments. A capacitor dielectric layer is between the top and bottom plate. The segments include a first segment electrically connected to a second node and at least a second segment electrically connected to a third node, with separation regions located between adjacent spaced apart segments. The top plate covers at least a portion of each of the separation regions.

公开(公告)号：US11688760B2

公开(公告)日：2023-06-27

申请号：US17409080

申请日：2021-08-23

Applicant: Texas Instruments Incorporated

Inventor： Jeffrey West ,  Mrinal Das ,  Byron Williams ,  Thomas Bonifield ,  Maxim Franke

IPC: H01L23/522 ,  H01L23/528 ,  H01L23/52 ,  H01L23/495 ,  H01L23/31 ,  H01L49/02 ,  H01L23/00

CPC classification number: H01L28/60 ,  H01L23/3107 ,  H01L23/4952 ,  H01L23/49513 ,  H01L23/49575 ,  H01L23/5223 ,  H01L23/5286 ,  H01L24/05 ,  H01L2224/04042 ,  H01L2224/05025 ,  H01L2924/1426

Abstract: An IC includes a substrate including circuitry configured to provide a receiver or a transmitter circuit. A metal stack is over the semiconductor surface including a top metal layer and a plurality of lower metal layers. An isolation capacitor includes the top metal layer as a top plate that is electrically connected to a first node; and a top dielectric layer on the top plate with a top plate dielectric aperture. One of the plurality of lower metal layers provides a bottom plate that includes a plurality of spaced apart segments. A capacitor dielectric layer is between the top and bottom plate. The segments include a first segment electrically connected to a second node and at least a second segment electrically connected to a third node, with separation regions located between adjacent spaced apart segments. The top plate covers at least a portion of each of the separation regions.

公开(公告)号：US20230188130A1

公开(公告)日：2023-06-15

申请号：US17709644

申请日：2022-03-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Rajdeep Bondade ,  Maxim Franke ,  Stephen Phillip Savage ,  Mrinal Kanti Das ,  Johan Tjeerd Strydom

IPC: H03K17/082 ,  H03K17/687

CPC classification number: H03K17/0822 ,  H03K17/6871 ,  H03K2217/94

Abstract: In one example, an apparatus comprises: a voltage sensing circuit having a voltage sensing terminal and a voltage sensing output, the voltage sensing circuit configured to generate a first voltage at the voltage sensing output representing a second voltage at the voltage sensing terminal; a control circuit having a control circuit input and a control circuit output, the control circuit input coupled to the voltage sensing output, the control circuit configured to: determine a state of a transistor based on the first voltage; and generate a driver signal at the control circuit output based on the state; and a driver circuit having a driver input and a switch control output, the driver input coupled to the control circuit output, the driver circuit configured to provide a current at the switch control output responsive to the driver signal.

公开(公告)号：US20230058511A1

公开(公告)日：2023-02-23

申请号：US17409080

申请日：2021-08-23

Applicant: Texas Instruments Incorporated

Inventor： Jeffrey West ,  Mrinal Das ,  Byron Williams ,  Thomas Bonifield ,  Maxim Franke

IPC: H01L49/02 ,  H01L23/522 ,  H01L23/528 ,  H01L23/00 ,  H01L23/31 ,  H01L23/495

Abstract: An IC includes a substrate including circuitry configured to provide a receiver or a transmitter circuit. A metal stack is over the semiconductor surface including a top metal layer and a plurality of lower metal layers. An isolation capacitor includes the top metal layer as a top plate that is electrically connected to a first node; and a top dielectric layer on the top plate with a top plate dielectric aperture. One of the plurality of lower metal layers provides a bottom plate that includes a plurality of spaced apart segments. A capacitor dielectric layer is between the top and bottom plate. The segments include a first segment electrically connected to a second node and at least a second segment electrically connected to a third node, with separation regions located between adjacent spaced apart segments. The top plate covers at least a portion of each of the separation regions.

公开(公告)号：US11961879B2

公开(公告)日：2024-04-16

申请号：US18309999

申请日：2023-05-01

Applicant: Texas Instruments Incorporated

Inventor： Jeffrey West ,  Mrinal Das ,  Byron Williams ,  Thomas Bonifield ,  Maxim Franke

IPC: H01L23/522 ,  H01L23/00 ,  H01L23/31 ,  H01L23/495 ,  H01L23/52 ,  H01L23/528 ,  H01L49/02

CPC classification number: H01L28/60 ,  H01L23/3107 ,  H01L23/49513 ,  H01L23/4952 ,  H01L23/49575 ,  H01L23/5223 ,  H01L23/5286 ,  H01L24/05 ,  H01L2224/04042 ,  H01L2224/05025 ,  H01L2924/1426

Abstract: An IC includes a substrate including circuitry configured to provide a receiver or a transmitter circuit. A metal stack is over the semiconductor surface including a top metal layer and a plurality of lower metal layers. An isolation capacitor includes the top metal layer as a top plate that is electrically connected to a first node; and a top dielectric layer on the top plate with a top plate dielectric aperture. One of the plurality of lower metal layers provides a bottom plate that includes a plurality of spaced apart segments. A capacitor dielectric layer is between the top and bottom plate. The segments include a first segment electrically connected to a second node and at least a second segment electrically connected to a third node, with separation regions located between adjacent spaced apart segments. The top plate covers at least a portion of each of the separation regions.

公开(公告)号：US20230336172A1

公开(公告)日：2023-10-19

申请号：US18208345

申请日：2023-06-12

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Rajdeep Bondade ,  Maxim Franke ,  Stephen Phillip Savage ,  Mrinal Kanti Das ,  Johan Tjeerd Strydom

IPC: H03K17/082 ,  H03K17/687

CPC classification number: H03K17/0822 ,  H03K17/6871 ,  H03K2217/94

Abstract: In one example, an apparatus comprises: a voltage sensing circuit having a voltage sensing terminal and a voltage sensing output, the voltage sensing circuit configured to generate a first voltage at the voltage sensing output representing a second voltage at the voltage sensing terminal; a control circuit having a control circuit input and a control circuit output, the control circuit input coupled to the voltage sensing output, the control circuit configured to: determine a state of a transistor based on the first voltage; and generate a driver signal at the control circuit output based on the state; and a driver circuit having a driver input and a switch control output, the driver input coupled to the control circuit output, the driver circuit configured to provide a current at the switch control output responsive to the driver signal.