公开(公告)号：US20170177783A1

公开(公告)日：2017-06-22

申请号：US15452259

申请日：2017-03-07

Applicant: Texas Instruments Incorporated

Inventor： Qi-Zhong HONG

IPC: G06F17/50 ,  H01L23/528 ,  H01L23/522

CPC classification number: G06F17/5077 ,  G06F17/5072 ,  G06F17/5081 ,  G06F2217/06 ,  G06F2217/12 ,  H01L23/5226 ,  H01L23/528 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of operating a computer system to improve via electromigration in an integrated circuit with multilevel interconnect. A method of operating a computer system to improve via electromigration in an integrated circuit with multilevel interconnect using via priority groups.

公开(公告)号：US20200381358A1

公开(公告)日：2020-12-03

申请号：US16995288

申请日：2020-08-17

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Qi-Zhong HONG ,  Honglin GUO ,  Benjamin James Timmer ,  Gregory Boyd SHINN

IPC: H01L23/522 ,  H01L49/02

Abstract: An integrated circuit (IC) includes a substrate having a semiconductor surface layer with functional circuitry for realizing at least one circuit function, with an inter level dielectric (ILD) layer on a metal layer that is above the semiconductor surface layer. A thin film resistor (TFR) including a TFR layer is on the ILD layer. At least one vertical metal wall is on at least two sides of the TFR. The metal walls include at least 2 metal levels coupled by filled vias. The functional circuitry is outside the metal walls.

公开(公告)号：US20190074193A1

公开(公告)日：2019-03-07

申请号：US15981725

申请日：2018-05-16

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Abbas ALI ,  Dhishan KANDE ,  Qi-Zhong HONG ,  Young-Joon PARK ,  Kyle MCPHERSON

IPC: H01L21/3213 ,  H01L21/768

CPC classification number: H01L21/32136 ,  H01L21/76819 ,  H01L21/76837 ,  H01L21/76841 ,  H01L21/76885 ,  H01L23/53223

Abstract: A method of fabricating an integrated circuit (IC) includes depositing an aluminum-containing metal interconnect layer at a first temperature over a semiconductor device having a plurality of transistors. The metal interconnect layer is annealed at a maximum annealing temperature that is less than the first temperature. The metal interconnect layer is patterned after the annealing, thereby interconnecting the transistors.

公开(公告)号：US20150186588A1

公开(公告)日：2015-07-02

申请号：US14577195

申请日：2014-12-19

Applicant: Texas Instruments Incorporated

Inventor： Qi-Zhong HONG

IPC: G06F17/50 ,  H01L23/522

CPC classification number: G06F17/5077 ,  G06F17/5072 ,  G06F17/5081 ,  G06F2217/06 ,  G06F2217/12 ,  H01L23/5226 ,  H01L23/528 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of operating a computer system to improve via electromigration in an integrated circuit with multilevel interconnect. A method of operating a computer system to improve via electromigration in an integrated circuit with multilevel interconnect using via priority groups.

Abstract translation: 一种操作计算机系统以改善具有多层互连的集成电路中的电迁移的方法。 一种操作计算机系统以通过使用经由优先级组的多电平互连的集成电路中的电迁移来改进的方法。