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公开(公告)号：US10593413B2
公开(公告)日：2020-03-17
申请号：US16112402
申请日：2018-08-24
摘要： A memory array comprising a word line and a bit line is disclosed. Each of a plurality of memory cells of the memory array has a first terminal connected to the bit line and a current path between the first terminal and a respective second terminal. A first memory cell of the plurality of memory cells has the second terminal coupled to receive a first supply voltage when selected by the word line. A second memory cell of the plurality of memory cells has the second terminal coupled to receive a voltage different from the first supply voltage when the first memory cell is selected by the word line.
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公开(公告)号：US20180012668A1
公开(公告)日：2018-01-11
申请号：US15709498
申请日：2017-09-20
CPC分类号： G11C17/08 , G11C7/18 , G11C16/0433 , G11C16/26 , G11C16/30
摘要： A memory array comprising a word line and a bit line is disclosed. Each of a plurality of memory cells of the memory array has a first terminal connected to the bit line and a current path between the first terminal and a respective second terminal. A first memory cell of the plurality of memory cells has the second terminal coupled to receive a first supply voltage when selected by the word line. A second memory cell of the plurality of memory cells has the second terminal coupled to receive a voltage different from the first supply voltage when the first memory cell is selected by the word line.
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公开(公告)号：US10062443B2
公开(公告)日：2018-08-28
申请号：US15709498
申请日：2017-09-20
CPC分类号： G11C17/08 , G11C7/18 , G11C16/0433 , G11C16/26 , G11C16/30
摘要： A memory array comprising a word line and a bit line is disclosed. Each of a plurality of memory cells of the memory array has a first terminal connected to the bit line and a current path between the first terminal and a respective second terminal. A first memory cell of the plurality of memory cells has the second terminal coupled to receive a first supply voltage when selected by the word line. A second memory cell of the plurality of memory cells has the second terminal coupled to receive a voltage different from the first supply voltage when the first memory cell is selected by the word line.
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公开(公告)号：US09799408B2
公开(公告)日：2017-10-24
申请号：US15050678
申请日：2016-02-23
CPC分类号： G11C17/08 , G11C7/18 , G11C16/0433 , G11C16/26 , G11C16/30
摘要： A memory array comprising a word line and a bit line is disclosed. Each of a plurality of memory cells of the memory array has a first terminal connected to the bit line and a current path between the first terminal and a respective second terminal. A first memory cell of the plurality of memory cells has the second terminal coupled to receive a first supply voltage when selected by the word line. A second memory cell of the plurality of memory cells has the second terminal coupled to receive a voltage different from the first supply voltage when the first memory cell is selected by the word line.
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公开(公告)号：US20180366205A1
公开(公告)日：2018-12-20
申请号：US16112402
申请日：2018-08-24
摘要： A memory array comprising a word line and a bit line is disclosed. Each of a plurality of memory cells of the memory array has a first terminal connected to the bit line and a current path between the first terminal and a respective second terminal. A first memory cell of the plurality of memory cells has the second terminal coupled to receive a first supply voltage when selected by the word line. A second memory cell of the plurality of memory cells has the second terminal coupled to receive a voltage different from the first supply voltage when the first memory cell is selected by the word line.
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公开(公告)号：US20170243659A1
公开(公告)日：2017-08-24
申请号：US15050678
申请日：2016-02-23
IPC分类号： G11C17/08
CPC分类号： G11C17/08 , G11C7/18 , G11C16/0433 , G11C16/26 , G11C16/30
摘要： A memory array comprising a word line and a bit line is disclosed. Each of a plurality of memory cells of the memory array has a first terminal connected to the bit line and a current path between the first terminal and a respective second terminal. A first memory cell of the plurality of memory cells has the second terminal coupled to receive a first supply voltage when selected by the word line. A second memory cell of the plurality of memory cells has the second terminal coupled to receive a voltage different from the first supply voltage when the first memory cell is selected by the word line.
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